Fig. 7: Reusability of the MPGA. | Nature Communications

Fig. 7: Reusability of the MPGA.

From: General-purpose mechanical computing enabled by origami circuit reconfiguration with robotic addressing and activation

Fig. 7

a Reprogrammable schematic of an m-bit adder and m-bit subtractor based on a 3-input 2-output MPGA. b Schematic of the experimental platform for a two-bit adder implemented using the MPGA. c Schematic of the experimental platform for a two-bit adder constructed with predefined full adder functionality. d Schematic of the mobile full adder in Layer 2, and e the truth table for the motion control of the mobile robot. f Computational workflow of the two-bit adder, showing the magnetic field layouts of Layer 1 and Layer 3, and the trajectory map of Layer 2. Light green, green, and dark green indicate the trajectories for computational tasks 0 + 3 = 3, 2 + 0 = 2, and 3 + 3 = 6, respectively. g Experimental images corresponding to the three computational tasks above. Blue and orange circles represent the magnetic fields serving as memory stimulus and input stimulus, respectively, with the arrows at their centers indicating the direction of the magnetic fields.

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