Fig. 3: vdW interface-integrated MoS2 n-type field-effect transistor (nFET) and WSe2 p-type field-effect transistor (pFET).
a Schematic of the top-gated FETs fabricated with the vdW interface-integrated HfO2/TMD (MoS2, WSe2) gate stack (≈5 nm MoS2 and WSe2, ≈10 nm HfO2; Channel length and width are 3 µm, respectively). b Extracted interface charge trap density (Dit) as a function of frequency using the conduction method from multi-frequency capacitance–voltage measurements. c Cumulative transfer characteristics of 40 MoS2 nFETs and WSe2 pFETs with the median transfer curves highlighted (at VDS = \(\pm\)0.5, respectively). Note that all the devices were measured at gate voltage sweeping speed of 0.025 V/s. Both MoS2 nFET and WSe2 pFET exhibit the near-ideal subthreshold swings (61 mV/dec and 63 mV/dec, respectively, at 300 K) with low gate leakage current of ≈10-13 A. IDS and IGS denote the drain and gate currents, respectively, while VDS and VGS represent the drain-to-source and gate-to-source voltages. SS refers to the subthreshold swing. d–f The full view (d) and enlarged view (e, f) of the dual sweep transfer curves measured at various gate-voltage sweeping speeds, indicating negligible hysteresis of ≈3 mV (Inset: enlarged view of measured hysteresis under gate sweep rate of 0.01 V/s). g–i The full view (g) and enlarged view (h, i) of the dual sweep transfer curves under different gate-voltage sweeping ranges, also exhibiting small hysteresis of ≈3 mV (Inset: enlarged view of measured hysteresis under gate sweep range; −0.5 V to 0.8 V, and 0.5 V to −0.8 V, respectively).
