Introduction

The discovery of coherent quantum phase slip (CQPS) in superconducting circuits has opened up a new direction of research and development1. The demonstration of the Charge Quantum Interference Device (CQUID) is an example, where a static charge of a small island between two weak links in the superconductor (the superconducting nanowires) altered the interference of magnetic fluxes tunneling coherently across the weak links2. The CQUID thus exploits the Aharonov-Casher effect. Another example is current quantization in superconducting nanowires or JJs under microwave (MW) radiation, the so-called Dual Shapiro steps3,4,5.

The effect is a consequence of the coherent phase locking of the supercurrent with the MW. Further development is envisaged as the combination of two devices, the CQUID and Dual Shapiro steps. Such a device would have a new functionality, the delivery of gate-controlled non-dissipative quantized supercurrent to the quantum circuits. Conceptually, it would be called the Bloch Transistor6. Original works on the CQUID and Dual Shapiro steps dealt with superconducting nanowires2,3. But from a practical point of view, devices with JJs, which act as CQPS elements, are more valuable because the fabrication of JJs is more reliable and controllable compared to superconducting nanowires5.

To operate in the CQPS regime, JJ should have the Josephson coupling energy, EJ, and the charging energy, EC close to each other. EJ and EC depend on the JJ critical current, IC, and the capacitance, C

$${E}_{J}=\frac{{I}_{C}{\Phi }_{0}}{2\pi },\,{E}_{C}=\frac{{e}^{2}}{2C},$$
(1)

where Φ0 is the superconducting flux quantum. Research with JJ is predominantly focused on two limiting cases of parameters: EJ > > EC and EJ < < EC. They concern states where one of the conjugated quantum variables, either the superconducting phase φ or the number of Cooper pairs n, is well defined. Examples of devices where φ is a good quantum number are SQUID magnetometer7 and Josephson voltage standard8. Their operation is based on the coherent evolution of φ across the Josephson junction (JJ). The Charge Qubit operating with n as a good quantum number, represents the opposite case9. The regime of JJs with EJ ~ EC, is rather unexplored experimentally. The interest in this regime mainly concerned the parity issue and energy spectroscopy of the Cooper Pair Transistor10,11,12. Less attention was paid to the CQPS. The study of Bloch Transistor (BT) operation would shed light on the fundamentals of the CQPS phenomenon and its implementation to quantum devices with new functionalities.

In the current work, we combine two devices, the CQUID and Dual Shapiro Steps, and demonstrate current quantization that can be controlled with electrostatic gating. The phase-locking mechanism, which enables the current quantization, is unique in this device and different from that in devices with a single JJ. The phase-locking in our device is due to the oscillating charge on the island. This allows us to control the quantized current by gating through the Aharonov-Casher effect. In a system with single JJ, the phase-locking is the result of oscillating current, so gate control cannot be realized.

The experimental sample consists of two JJs separated by a small island with a gate electrode, see Fig. 1a, b. When the circuit is voltage biased and the MW is applied, the current quantization is developed. We control quantization with the voltage applied to the gate electrode through the Aharonov-Casher effect, Fig. 1c. Further experiments show that there are three other ways to control the quantized current: with the bias voltage, the amplitude, and frequency of the MW signal as shown in Fig. 1d. In the following text, for convenience, we refer to the device as BT.

Fig. 1: Overview of the experimental sample.
Fig. 1: Overview of the experimental sample.
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a Focused Ion Beam image of the BT circuit. Two identical Al JJs separated by a small island embedded in the circuit with the super-inductors L1+ L2 ~ 1.5 μH, resistors R= 6.3 kΩ and quasiparticle traps QP. The MW is delivered to JJs by the gate electrode with capacitance Cg; b Equivalent electric circuit of the device; c Interference of the fluxons tunneling through the JJs; d Cartoon of the Bloch Transistor with four controls: the gate/bias voltage and the frequency/amplitude of the microwave.

Results and discussion

Experimental samples and model of the Bloch transistor

We carry out the experiments at extreme cryogenic temperatures  ~ 15 mK. The BT is fully isolated from environmental electromagnetic (EM) noise. It is housed at the cold stage of the dilution refrigerator, and uses dc and rf circuitry, which are common for operation with the superconducting qubits, photon sources, resonators, etc. The dc lines connecting to the equipment at room temperature pass through the low-pass filters with a bandwidth of 1 GHz. The MW lines have attenuators of -60 dBm from the top to the bottom of the refrigerator, which strongly suppress arbitrary high frequency noise. Further filtering of the EM noise is done on the BT chip as shown in Fig. 1a. More details of the BT chip are explained later and in Supplementary Note 1. For dc measurement we use four-point methods with the symmetric differential amplifier. The measurement is a mixture of current and voltage bias schemes, where both voltage and current are probed independently of the bias Vb. The setup allows measuring I − V curves with back-bending as in Fig. 2a. The principle scheme of the amplifier is given in the Supplementary Note 25.

Fig. 2: Experimental I − V curve without and with the MW.
Fig. 2: Experimental I − V curve without and with the MW.
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a I − V curve has current blockade below critical voltage \({V}_{C}^{*}=2.5\,\mu V\). The apparent critical current is \({I}_{C}^{*} \sim 14\,nA\); b Current quantization under the MW of 6.91 GHz. The horizontal lines indicate the current corresponding to I = 2efn, n = 0, ± 1, ± 2. One can tune the BT to different n by varying Vb.

The BT features two aluminum JJs separated by a small island, the isolation/screening circuit, and the combined MW feed line/gate electrode. The on-chip isolation circuit has normal metal 15 nm-thick Pd resistors of R= 6.3 kΩ and highly inductive 5 nm thick TiN meanders, L1 + L2 ~ 1.5 μH. This high-impedance circuit strongly suppresses EM noise in the JJ leads, which is a requirement of CQPS operation13. The high inductance of the TiN film ensures a small footprint of the inductive element that minimizes parasitic stray capacitance and optimizes the total size of the device to  < 100 μm2. A TiN/Al/Pd sandwich, marked as quasiparticle trap (QP) in the figure, relaxes the quasiparticles generated in the TiN meanders under MW radiation5.

Two JJs of area 40 × 90 nm2 are of superconductor-insulator-superconductor type with normal resistance Rn ~ 1.7 kΩ (measured in co-fabricated individual JJ junctions). From the value of Rn we estimate IC = 186 nA, and EJ/h ~ 92.5 GHz. The charging energy calculated from the geometrical capacitance of the JJ, 0.18 fF, is ECJ/h ~ 107 GHz. However, for a further estimate of the phase slip energy of the fluxon tunneling across the JJs, ES0, one has to include in the calculation of the charging energy the parallel stray capacitance of the screening circuit,  ~ 1 fF14. We denote this energy by EC. This reduces EC/h to  ~ 16.4 GHz. The combination of EC and EJ enables us to calculate ES05,15

$${E}_{S0}=\sqrt{\frac{8{E}_{p}}{\pi {E}_{C}}}{E}_{p}{e}^{-{E}_{p}/{E}_{C}},$$
(2)

where \({E}_{p}=\sqrt{8{E}_{J}{E}_{C}}\) is the plasma energy15. By substituting the energies into the equation we get ES0/h ~ 0.55 GHz. When bias Vb is applied to the BT, the current is blocked below the apparent critical voltage \({V}_{C}^{*}\) related to ES0 by

$${V}_{C}^{*}=\frac{{(2\pi {E}_{S0})}^{2}}{8{e}^{2}R\delta {I}_{T}},$$
(3)

where R is the normal resistor of the screening circuit defined above, δIT ~ 1 nA, is the thermal noise of the screening circuit, see Supplementary Note 3. Above \({V}_{C}^{*}\) the BT has a branch with supercurrent. The latter is quantized when the MW is applied to the circuit. The effect is due to the phase locking of the MW with the Bloch oscillations in the JJs. The quantization is described by the equation

$$V({I}_{dc})=\sum\limits_{n}{J}_{n}^{2}(\frac{\delta {Q}_{g}}{2e}){V}_{0}({I}_{dc}-2efn),$$
(4)

where V0(I) is the I − V curve without the MW, see Eq. (S9) of Supplementary Note 3. In (4)Jn(x) is the Bessel function of the n-th order and δQg is the amplitude of the fluctuating charge on the island induced by the MW. The mechanism of phase locking is substantially different from that in the circuit with a single JJ4,5. In single JJ the MW locks the superconducting phase with the current \({I}_{ac}\cos (\omega t)\), while in BT it induces fluctuating charge at the island \(\delta {Q}_{g}\cos (\omega t)\), see the full analysis in Supplementary Note 3. The form of Eq. (4) is similar to that of a single JJ when replacing the argument of the Bessel function from δQg/2e to Iac/2ef, where Iac is the amplitude of the MW.

The new mechanism of phase locking allows us to control quantization with the static charge Qg = CgVg induced on the BT island. The interference of the fluxons tunneling across the JJs and around the static charge causes a modulation of the phase slip energy ES (the Aharonov-Casher effect)2,16

$${E}_{S}=2{E}_{S0} \left| \cos \left(\pi \frac{{Q}_{g}}{2e}\right)\right|,$$
(5)

In this equation, we assume that two JJs are identical. The modulation of ES propagates to V0(I) in (4), so that the plateaus of the quantized current should be periodically modulated.

Operation of the Bloch transistor

Three BTs have been studied. We present data for one of them. The I − V curve resembles that of the usual JJ, but with the current blockade below the apparent critical voltage, \({V}_{C}^{*} \sim 2.5\,\mu\)V, see Fig. 2a. It is smaller than  ~ 3.5 μV calculated using (3). The difference can be attributed to the uncertainties of the stray capacitance and thermal noise current used in the calculation. We should note that BT operates in the limit of strong noise \(e{V}_{C}^{*} < {k}_{B}T\). At small bias the differential resistance reaches ~20 kΩ.

Above the apparent critical voltage, the I − V curve has the supercurrent branch with the apparent critical current \({I}_{C}^{*}\approx 14\,nA\). Then the experimental points follow the Ohmic law. The \({I}_{C}^{*}\) is smaller than the critical current IC ~ 100 nA of co-fabricated JJs which are not embedded in the screening circuit, see Supplementary Note 4. One can relate \({I}_{C}^{*}\) to Zener current IZ = (πEJ/16ECJ)IC4,5. By substituting EJ and ECJ we get IZ ~ 17 nA, which is fairly close to experimental \({I}_{C}^{*}\). The resonances are visible on the I − V curve. The most evident resonance is between 2 nA and 4 nA. We relate these resonances to the rectification of white noise by the isolation LC circuit of the BT that has its own resonance frequencies. We confirmed that in the BT with reduced inductance, the resonances shift to higher frequencies.

The current plateaus are developed at the I − V curve when the MW is fed to the BT through the gate electrode, see Fig. 2b. Five plateaus, In = 2efn with n = 0, ± 1, ± 2, are visible when the MW frequency is f = 6.91 GHz. The differential resistance of the quantized plateaus is smaller than the “blockade” resistance without the MW. It reaches only 1 kΩ in the centers of the plateaus. In the BT under study, quantization is present between 6.7 GHz and 10.4 GHz, see Supplementary Note 5. The maximum quantized current is  ~6.6 nA. The quantized current can be accurately controlled by means of four handles: gate and bias voltages, the amplitude and frequency of the MW. The prime control is done with the gate voltage. The application of Vg periodically changes the slopes of the current plateaus, so that the current periodically deviates from the quantized value. The effect is clearly seen in the differential resistance dV/dI, see 3D plot in Fig. 3a. The peaks of the differential resistance are positioned in the centers of the current plateaus In = 2efn. They are only  ~1 kΩ (the maximum of dV/dI at low bias without the MW is  ~20 kΩ). Due to the low floor of dV/dI under the MW, the gate voltage modulation is as high as 40% (it is only 14% without the MW). As we discussed above, the modulation is due to the control of the interference of the fluxon tunneling across the JJs (the Aharonov-Casher effect). The modulation period ΔVg in Fig. 3 is e/Cg. We confirm the period using experiments with the Single Electron Transistors (SET) of the same geometry as the BT. The Coulomb Blockade Oscillations of the SET are predominantly e/Cg-periodic, except in some special cases17. The experimental curves of the SET are shown in Supplementary Note 6. The modulation period of BT is half that expected from (5). We relate the effect to the poisoning circuit with the quasiparticles generated in the inductors L1,2 by MW. The appearance of quasiparticle poisoning is different in the BT and in the CQUID2. In the BT the time constant of the probing dV/dI largely exceeds tunneling and relaxation times of the quasiparticles. Because of this, the effect is seen as the modulation of the differential resistance with the period corresponding to the electron charge e after averaging two states with different parities. This averaging reduces the depth of the modulation also by half in BT. In the CQUID the probing of the qubit state is faster than the evolution of the quasiparticle. As a result, one can see simultaneously two states of the qubit with different parities, each with 2e periodicity. The gating effect is weakly pronounced in the direct I − V curve, see Fig. S6 of Supplementary Note 5.

Fig. 3: Gate control of the BT.
Fig. 3: Gate control of the BT.
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a The intensity graph of the differential resistance dV/dI vs normalized current Idc/2ef and gate voltage. The peaks of dV/dI are at the centers of the quantized plateaus Idc = 2efn. They are periodically modulated with the charge e = VgCg induced at the island between the JJs; b Stack of cross sections of the intensity graph taken at fixed Idc/2ef corresponding to different n. Each curve has the absolute value of dV/dI, between zero and 1.2 kΩ. Zeros of dV/dI of each curve are shown as the solid line of the corresponding color. There is a phase shift of the gate modulation between different n.

One can also note that the position of the peaks in Vg shifts linearly with Idc. It is clearly seen in Fig. 3b, where the modulation curves at different current plateaus (n= 0,  ± 1,  ± 2) are compiled together. The phase of the oscillations is consistently shifted with the bias. It can be related to the presence of a small capacitance of the JJs themselves: the voltage V across the BT may induce the extra charge at the island, which is added to that induced by the Vg, and change the oscillation phase.

Finally, to enable the Aharonov-Casher effect, the kinetic capacitance in the circuit Ckin = e/πVC (VC = πES0/e) should be greater than Cg18. This condition is satisfied in our devices: Ckin = 7.1 fF and Cg = 0.134 fF.

One can also vary the quantized current with the bias voltage, Vb. The effect is easy to perceive from the I − V curve of the BT, see Fig. 2b. One can move from one current plateau to another by varying Vb. Such a control is possible because in our measurement scheme the relation between the voltage applied to the circuit, Vb, and voltage measured across the BT itself, V, is not linear. However, the current-voltage relationship does not have one-to-one correspondence and depends on the history. The full range of control is limited by the apparent critical voltage V*C, which is  ± 2.5 μV in the current BT.

The MW control of the BT with the amplitude and frequency of the MW, δQg and f, comes from (4): the width of the current plateaus is modulated with the MW amplitude while the current value itself is proportional to f as I = 2efn. The effect is well pronounced in differential resistance dV/dI, see Fig. 4a. In the figure Idc and δQg are normalized to the quantized current step 2ef and charge 2e. The light colors at Idc/2ef= 1, 2, 3, 4 correspond to the maxima of dV/dI at the centers of the quantized current plateaus. When Idc is fixed to the quantized value 2efn, the peaks of dV/dI follow \({J}_{n}^{2}(\delta {Q}_{g}/2e)\) dependence, see Fig. 4b. The curve is approximated with Eq. (S10) of Supplementary Note 3. The variation of δQg deviates the current from the quantized plateaus 2efn.

Fig. 4: MW control of the BT.
Fig. 4: MW control of the BT.
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a Intensity plot of the differential resistance dV/dI at different bias and δQg/2e. The bright peaks are located at the quantized current plateaus, Idc = 2efn; b Cross section of dV/dI at Idc = 2ef (green dots). The solid blue line is a fit of the experimental data with the square of Bessel function \({J}_{n}^{2}(\delta {Q}_{g}/2e)\) with n= 1.

The BT can potentially deliver non-dissipative quantized current to the quantum circuit with high accuracy. Such functionality is useful for quantum circuits where the dissipation is an issue and the operation is carried out with precise tiny signals.

Further optimization and application

The accuracy of BT’s current quantization is currently limited. For example, a precision better than 1 ppm is needed for the current standard. A fair analysis of the quantization accuracy and ways to improve it are given in ref. 19. One focus of the development is the thermal noise of the resistors in the screening circuit. MW applied to the BT heats the normal resistors, so that the fluctuating current δIT is activated. We estimate this current as  ~1 nA, which is comparable to the amplitude of the quantized current itself. One can either optimize the coupling of the MW to the JJ so that a weaker external MW can be used18. Alternatively, the on-chip JJ generator of the MW with good impedance matching can be used20. One can also increase ES by designing JJ with higher EJ and EC, while keeping EJ/EC ~ 1. However, the nano-fabrication imposes the limit. To increase EC one has to decrease the capacitance of JJ. The latter requires reducing the lateral size of the JJ. It is challenging to fabricate JJ smaller than 40 × 40 nm2 in a controllable way. One can also explore more effective cooling of the BT chip. Recently, immersion cooling of superconducting resonators in the 3He bath below the common plateau of 50 mK was reported21. The immersion cooling technology is compatible with the BT’s operation. However, it is a further complication towards the practical application of the device.

Optimization can also be done in the BT control circuit. In our measurements, we use a mixture of the voltage- and current- bias scheme5. Ideally, the pure voltage bias scheme should be used to properly bias the BT.

There are two straightforward applications of the BT in metrology and quantum coherent circuits. The BT can be used as the absolute quantum current standard in metrology. We recently reported on developing the metrological chip that contains voltage and current standards14. The BT can be naturally accommodated on this chip. The second application is envisaged in quantum circuits. BT can deliver the current to the control flux line in the qubit with the SQUID loop. For this application, BT has unique combinations of local on-chip design, compatibility of the fabrication technology with superconducting qubits, and a reduced back action on the quantum circuit because of the non-dissipative nature of the quantized current. The latter is important for ensuring the long decoherence time of the quantum circuit operation.

In summary, we demonstrate a new mechanism of phase locking with the MW in operation of the Bloch Transistor. Two phenomena, the Dual Shapiro Steps and Aharonov-Casher effect, are present in the BT. The operation of the BT is unique, as the non-dissipative current quantization is engaged with the fluctuating charge in the double JJs circuit. The maximum amplitude of the quantized current is  ~ 6.6 nA. The BT features four controls to set the current level, deactivate the current locking, and modulate the current amplitude. It can be part of a coherent quantum circuit that delivers a non-dissipative current. The technology of BT fabrication is scalable and compatible with that of other superconducting quantum devices. We believe that BT can be an essential part of the new cryogenic quantum technology platform. However, further improvements should be implemented to make the device more accurate and resistant to noise.

Methods

The fabrication of experimental samples includes four processes: Ti/Au (10 nm/80 nm) contacts for bonding, aluminum JJs, TiN (5nm) super-inductors and Pd resistors (15 nm). Super-inductors are prepared with ion etching of the ALD-grown TiN film in CF4 plasma. The inductance per square is  ~ 2 nH. Two TiN meanders have inductances 1.15 μH and 0.34 μH. Pd and Al are deposited by thermal evaporation. The Pd resistors have Rsquare ~ 10Ω. Aluminum JJs, Al/AlOx/Al, are fabricated with the shadow evaporation technique. The normal resistance of the JJ is RN ~ 600Ω recalculated for junction size 100 × 100 nm.

Low-temperature experiments are conducted in a dry dilution refrigerator with a base temperature of 15 mK. The thermo-coaxial cables are used for dc lines from room temperature to 15 mK. They are thermalised at 50 K, 4 K, 800 mK and 15 mK. Twisted pairs are used for electric circuitry at the base temperature. The dc signals pass through cascade of LTCC low pass filters with a stop band from 80 MHz to 20 GHz before reaching the BT. The MW lines have attenuators at different temperature stages with a total value  of -60 dB. The I − V and dV/dI curves are taken using the differential amplifier at room temperature.

There are events of arbitrary phase jumps in dV/dI modulation with the gate voltage. The occurrence of them increases when the MW is applied. Their typical time constant is few seconds (the transconductance of the BT with frequent switches is shown in Fig. S9 of the Supplementary Note 7). It is highly probable that we encounter a fluctuating charge in the materials. The stability of BT against switches can be improved by annealing BT to 4 K, and cooling it back to the operation temperature of 15 mK. The graph in Fig. 3 is compiled after the annealing procedure.