Search

Zhang et al. report a foundry-compatible γ-ray treatment to induce chemical bond changes of organic contaminants in carbon nanotube transistors, mitigating the imperfections at the carbon nanotube/dielectric interface, reducing the off-state current density to 112.2 pA μm-1, and achieving radiation tolerance up to 100 Mrad(Si).

High-speed flexible circuits are essential in flexible systems for real-time information analysis and wireless communication. Here, flexible circuits are reported with a 281 ps stage delay based on scaled carbon nanotube thin film transistors.

Using field-effect transistors made from carbon nanotube films, five-stage ring oscillators can be fabricated that exhibit an oscillation frequency of up to 5.54 GHz.

The performance of p-type transistors based on 2D semiconductors has not yet reached the level required for the realization of competitive complementary metal-oxide-semiconductor (CMOS) circuits. In this Comment, the authors discuss the recent developments, current challenges, and future outlook of 2D p-type transistors.

By optimizing gate structures and fabrication processes, carbon nanotube metal–oxide–semiconductor field-effect transistors can be fabricated that exhibit a cut-off frequency beyond 1 THz.

This study proposes a contact-dominated, field-enhanced design for capacitive sensors, achieving high response, strong linearity, and high sensitivity over a broad range, demonstrating great potential for functionalized flexible electronics and artificial intelligence robotic applications

Rhee et al. report scalable reconfigurable carbon nanotube transistors with a ferroelectric aluminum scandium nitride gate dielectric. They show balanced ambipolar currents, strong memory retention, and enable ternary content-addressable memory with fewer devices than traditional silicon circuits.

A multi-layer wafer-scale 2D gate-all-around system with an atomically smooth interface fabricated via epitaxial monolithic 3D integration shows good performance and power efficiency, holding promise for the forthcoming ångström technology node.

This Consensus Statement discusses common misunderstandings about photodetector performance characterization and reporting, and offers recommendations for standardized practices.

Transistor scaling degrades intrinsic gain, challenging analog circuit design. The authors fabricated carbon nanotube thin-film transistors with gate-modulated negative differential resistance, achieving high and variable intrinsic gain, even at deep-submicron scales.

2D semiconductors, one of the transformative technologies for sub-1-nm technology node integrated circuits, are at a tipping point in transitioning from laboratory research to industry manufacturing. Therefore, 2D transistor fabrication and chip integration that are compatible with standard foundry workflows and benchmarks that meet industry requirements must be established.

WS₂ is a promising material for application in next-generation electronics, yet current methods of fabrication can only yield micrometre-sized domains. Here, via ambient-pressure CVD, the authors report the growth of high-quality, uniform monolayer WS₂single crystals of the order of millimetres.

Grain boundaries in graphene degrade its properties, and large single-crystal graphene is desirable for electronic applications of graphene. Gaoet al. develop a method to produce millimetre-sized hexagonal single-crystal graphene grains, and films composed of the grains, on platinum by chemical vapour deposition.

Photovoltages generated from semiconducting single-walled carbon nanotubes are often too small for most practical solar-energy-harvesting applications. Here, researchers demonstrate that virtual contacts can be used to multiply photovoltages from around 0.2 V to 1.0 V.

By constructing vertical tunnel junctions based on few-layer indium selenide, a chirality-sensitive detection method is developed, enabling the investigation of the interaction between chiral light and spin in the two-dimensional limit.

A yttrium-doped metallic two-dimensional buffer layer can be used to improve charge carrier transport between the metal contacts and semiconductor channel in molybdenum-disulfide-based transistors.

2D materials hold great promise for logic scaling beyond the limit of silicon MOSFET. However, in the absence of widely accepted guidelines for the performance comparison of the two technologies, it is essential to set proper standards to benchmark 2D transistors against silicon transistors.

A two-dimensional field-effect transistor made of indium selenide is shown to outperform state-of-the-art silicon-based transistors, operating at lower supply voltage and achieving record high transconductance and ballistic ratio.

Carbon nanotube networks made with high purity and ultraclean interfaces can be used to make a tensor processing unit that contains 3,000 transistors in a systolic array architecture to improve energy efficiency in accelerating neural network tasks.

Using electrostatic doping, the real and imaginary parts of the refractive index along the extraordinary axis of semiconducting, highly aligned, single-walled carbon nanotubes over 4″ wafers can be tuned by up to 5.9% and 14.3% in the infrared at 2,200 nm and 1,660 nm, respectively.

Aligned carbon nanotubes can be used to create six-transistor static random-access memory cells with an area of less than 1 μm² and performance superior to cells made using 90-nm-node silicon transistors, as well as field-effect transistors with scaled contacted gate pitch comparable with the 10 nm silicon technology node.

Single-material monolithic optoelectronic integrated circuits via CMOS compatible low-temperature approaches are crucial to the continued development of post-Moore electronics. Liuet al., report carbon nanotube based electrically driven 3D monolithic optoelectronic integrated circuits.

Field-effect transistors fabricated from carbon nanotubes have been investigated extensively over the past two decades. This study demonstrates a nanotube-based integrated circuit design that substantially improves the speed and power consumption with respect to silicon-based integrated circuits.

A pair of rows of field-effect transistors fabricated perpendicular to the growth direction on an aligned carbon nanotube array can create twinned physically unclonable functions for use in secure communication.

This Perspective explores the potential of carbon nanotube electronics, examining the development of nanotube-based field-effect transistors and integrated circuits, and the challenges that exist in delivering large-scale systems.

Transistors based on arrays of aligned carbon nanotubes can exhibit cutoff frequencies of up to 540 GHz, and could be further scaled for operation at millimetre-wave and terahertz frequencies.

By using carbon nanotubes as a channel material, an ion gel as a gate and polyimide as a substrate, field-effect transistors can be created that have a high radiation tolerance and can be repaired by annealing.

Three-dimensional integrated circuits based on slot antennas and carbon nanotubes can combine plasmonics and electronics, and can be used to create unidirectional receivers and wavelength- and polarization-division multiplexing.

Flexible integrated circuits built using carbon nanotube thin-film transistors can offer sub-10 ns stage delays.

Carbon nanotube-based thin-film transistors and integrated circuits, which offer low power consumption and highly uniform performance, can be transferred to arbitrary substrates, including biodegradable polymers, plant leaves, and a person's wrist.

This Perspective examines the challenges involved in assessing the operation and performance of field-effect transistors based on emerging materials, and provides guidelines for the consistent reporting and benchmarking of the devices.