Abstract
Silicon-based neural microneedle arrays, such as the Utah Array, have demonstrated excellent performance in chronic recordings from the cerebral cortex. Unlike planar thin-film electrodes with recording sites arranged on the surface of a silicon film, the recording sites of microneedle arrays are located at the tips of three-dimensional needles, which significantly complicates the fabrication process required for single-neuron recordings. To address this challenge, we develop a local de-insulation method for microneedle recording electrodes that eliminates the need for etching: the microneedle tips are encapsulated in a controllable-thickness protective layer, followed by deposition of a Parylene-C insulation layer. By optimizing the elasticity of the protection material, as well as its adhesion and shape on both the protective layer and the electrode shaft, we were able to precisely control the area of the removed insulated layers, resulting in consistent tip exposure. Experimental results show that the non-uniformity of the exposed microneedle recording sites in the silicon-based neural microelectrode arrays (each has 10 × 10 array) fabricated using this method is 3.32 ± 1.02%. Furthermore, the arrays exhibited high stability and reliability in both mechanical performance and electrical characteristics. They achieved an average spike signal-to-noise ratio of 12.63 ± 6.64 during in vivo testing. This fabrication technique provides a valuable method for the development of high-performance neural microelectrode array.

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Introduction
Silicon-based neural microelectrode arrays have become a significant branch of neural electrode technology due to their excellent uniformity, high integration, and the advantage of monolithic integration ability with amplification circuits1. Silicon microneedle electrode arrays, represented by the Utah array, have demonstrated effectiveness for over a year in chronic implantation2,3,4,5.
Unlike single silicon thin-film microneedle arrays, where recording sites are longitudinally distributed along the microneedle and implanted perpendicularly to the cortical surface, microneedle arrays consist of multiple silicon microneedles arranged in parallel at specific intervals, forming a quasi-3 dimensions (3D) structure. The recording sites are located at the tips of each microneedle, and after implantation, these sites are mainly positioned parallel to the surface of the cortex, facilitating the recording of neural activities across different functional regions of the brain6,7,8,9. Due to the difficulty of densely inserting multiple microneedles into the cortex, most microelectrode arrays, whether fabricated with rigid or flexible substrates, commonly use multiple recording sites on a single needle, requiring deep implantation. In contrast, a silicon microneedle array is implanted at relatively shallow depths, combined with shape memory alloy fan-out leads providing a cushioning effect, balancing the electrode’s weight and movement. This creates a “floating” effect of the electrode on the cortical surface, significantly reducing compression and impact between the electrode and the implantation site, thus demonstrating excellent long-term biocompatibility. As a result, these electrodes are among the few that have received Food and Drug Administration (FDA) approval for clinical trials10,11,12,13.
In summary, silicon-based microneedle electrode arrays offer advantages such as broad cortical coverage, capability of implantation without additional reinforcement, and favorable characteristics for chronic implantation.
The size of the electrode’s recording site plays a key role in defining the spatial resolution of the signals captured. For precise differentiation of localized neural signals, including local field potentials and single-neuron action potentials that have distinct spatial properties, the standard practice is to leave only the necessary recording site exposed while insulating the rest of the electrode. This is commonly achieved using planar microfabrication techniques.
Regardless of whether the electrodes are made from silicon thin films14,15,16 or flexible materials17,18,19, the standard “planar lithography process” is employed to create a patterned mask on the insulating layer. This mask is then used to etch away the insulation at the recording sites, resulting in localized de-insulation.
However, the recording sites of microneedle arrays are three-dimensional. They typically require the exposure of microneedle tips with heights of tens of microns. This makes conventional planar lithography processes difficult to implement. Early work by Jones et al. involved passing the insulated microneedles’ tips through a thin metal or Polytetrafluoroethylene (PTFE) foils20. Then, using them as a mask. Oxygen plasmas are used to remove the polyimide layer from the tips. However, this method struggled to achieve uniform exposure and was heavily dependent on operator skill. Later, R. Bhandari et al. immersed the fully insulated microneedle arrays into an ultra-thick (about 1.2 mm) photoresist, selectively removing the photoresist through exposure and developing a certain depth of photoresist, and subsequently etching away the insulation layer on the exposed microneedle tips. However, this process was complex and difficult to control21. Other teams have explored maskless removal methods, such as S. B. Goncalves et al., who protect the silicon-needles arrays with medical epoxy and used a dicing saw to expose the tips22. and Mohammad Sadeq Salel et al., who used focused ion beams to remove the Parylene-C layer at the needle tip, exposing only a small area23. These methods typically require individual treatment of each needle, making it difficult to ensure uniformity, and demand precise control to avoid damaging the recording sites. All these methods involve first growing the insulation layer and then using various complex methods to remove it from the needle tips.
To address these limitations, we developed a method that does not require etching. By growing the insulation layer on the electrode but not the recording site at the needle tips we achieved electrode recording sites with better uniformity, moderate impedance, and high signal to noise ratio recording performance. Compared to traditional etching methods, this novel method significantly improves fabrication efficiency while ensuring uniform tip exposure.
Using this local de-insulation method, we successfully fabricated a silicon-based microneedle electrode array. Both in vitro and in vivo tests and evaluations was conducted. The results showed that the fabricated prototype device, maximum containing 100 channels, was compact, lightweight, and exhibited excellent impedance uniformity. In experiments, we recorded high signal-to-noise ratio single-neuron spike signals.
Results
Fabrication process of silicon-based neural microneedle electrode array
Figure 1 illustrates the fabrication process of silicon-based neural microneedle electrode arrays incorporating the local de-insulation method. This fabrication process is divided into two main stages: the backside processing and the frontside processing. The objective of the backside processing is to create a glass substrate that securely holds and electrically isolates the microneedle array (Fig. 1a–d). The purpose of the frontside processing is to complete the microneedle fabrication, metallization, insulation, and tip exposure, resulting in the final microneedle electrode array chip (Fig. 1e–h).
a 1800 μm thick double-polished silicon wafer. b Microneedle array root fabrication with etching. c Microneedle array backboard formation with Silicon-glass bonding. d Microneedle array backend metallization. e Microneedle array pillar formation with sawing. f Microneedle array needle formation with wet etching. g Microneedle array metallization. h Microneedle array after local de-insulation. i Photograph of the completed microneedle array. j Photograph of a packaged microneedle array
In the backside processing, double-polished silicon wafers are first patterned with SiO2 and photoresist as mask layers. The 10 × 10 silicon pillar arrays are then etched into the wafers using inductively coupled plasma etching (ICP) (Fig. 1a, b). The wafer is then bonded to a BF33 glass with the same dimensions via anodic bonding in a vacuum environment. After bonding, the assembly is annealed in a tube furnace under nitrogen protection, allowing molten glass to fill the spaces around the silicon pillars, forming a stable glass/silicon bond. The wafer is then polished to expose the end of the silicon pillars (Fig. 1c). After polishing, the backside of each end of the pillars coated with Cr/Au using physical vapor deposition (PVD) vacuum deposition with the help of lift-off process (Fig. 1d). This metallization forms an ohmic contact with the low-resistivity silicon beneath it and serves as solder pads at the ends of each silicon pillar, which will later become neural electrodes.
For the frontside processing, a dicing saw is used to cut the silicon/glass from the frontside into 10 × 10 electrode arrays, maintaining the same center-to-center distance in both the X and Y directions as the pillar arrays on the backside, with a pillar depth of 1300 μm, including fins and corner posts surrounding each electrode unit (Fig. 1e). After cutting, the array undergoes dynamic and static etching steps in a mixed HF and HNO3 solution to form a uniform array of sharp-tipped microneedles (Fig. 1f). Cr/Au is deposited on the tips using PVD to metalize the electrode tips (Fig. 1g).
The local de-insulation method is developed to insulate the electrodes and expose the tips (Fig. 1h). Once tip exposure is complete, the silicon-based neural microneedle electrode array is finalized (Fig. 1i). Finally, the electrodes are fan out by wedge bonding each channel to a printed circuit board (PCB) with insulated gold wires. After bonding, the gold wires are wrapped together and coated with silicone to ensure biocompatibility (Fig. 1j).
Local de-insulation method
Parylene films are often used to insulate neural probes21,23. A common method to insulate the neural probe involves depositing the insulating layer first and then selectively etching away the defined parts. The etching process must be strictly controlled. Under-etching will leave an insulating film on the electrode, while over-etching will destroy the recording sites, even though oxygen plasma is considered to etch very little into the metal material. In fact, oxygen plasma has enough energy to physically etch away the metal layer at the tips. Since the tips of the microneedles are 3D structures, the top ends of the tips experience more etching than the rest of the tips. To overcome these deficiencies, a de-insulation method involving masking the tips before the insulating layer (Parylene-C) is deposited is proposed. In this method, the fabricated needle arrays are placed upside down with their tips protected by a layer of masking material with a certain thickness. During the chemical vapor deposition (CVD) deposition process, the Parylene-C covers both the mask and the exposed needle arrays. After CVD deposition, the recording sites are created by pulling the needle array out of the mask. By optimizing the masking material and the mask-forming process, the location and margin of the insulating layer on the needles can be precisely controlled. The cornerstones of this method include: 1. Ensuring that the electrode tips can penetrate through the masking material, make contact with the underlying substrate, and remain undamaged; 2. The masking material must possess elastic properties to tightly wrap around the electrode tips and form a seal, preventing the deposition of Parylene-C; 3. No masking material residue remains on the electrode tips after the microneedles are withdrawn from the mask. The proposed de-insulation method is illustrated in Fig. 2, highlighting three key steps that ensure precise control over the exposure of the electrode tips.
a Prepare a clean glass slide as the substrate. b Spin-coat the desired thickness of the mask onto the substrate. c Perform silanization treatment on the electrode. d Insert the tips of the silicon needle array into the mask until the tip ends rest against the surface of the glass slide. e Deposit a layer of Parylene-C as insulation. f Lift out the electrode from the mask, and the Parylene-C layer will break at the designed location
Height control of the mask
The tip exposure length is controlled by adjusting the thickness of the Polydimethylsiloxane (PDMS), which is used as the mask in the method. The thickness of PDMS can be easily controlled over a wide range, from micrometers to millimeters, through either spin coating or mold casting. In the application of silicon-based neural microelectrodes, a tip exposure length between 30 and 100 μm is considered acceptable. PDMS polymer and curing agent were mixed at a 10:1 weight ratio and spin-coated onto a clean glass slide (Fig. 2a, b). As shown in Fig. 3a, the thickness of the PDMS can be controlled by spinning speed.
a Variation of PDMS thickness with spin coating speed. b Comparison of capillary phenomena when electrode array tips are inserted into PDMS of different viscosities (the noticeable capillary phenomena have been outlined with yellow lines). When the electrodes are inserted immediately after the PDMS has been spun, noticeable capillary action is observed. As the curing time increases to 5 min, the capillary effect becomes less discernible under an optical microscope. SEM reveals a slight capillary action still present at 7 min. At 8 min, the tips of the silicon-based microelectrode arrays are easily inserted and encapsulated by the PDMS without any capillary action occurring. c The average tip exposure length after the local de-insulation process for four electrode arrays (each has 10 × 10 array, totaling 400 recording sites) from the same batch. The average tip exposure length for the 400 recording sites is 50 ± 0.77 μm. d, e Tip exposure effects after the local de-insulation method process
Control of PDMS viscosity
To ensure the consistency and precision of tip exposure, the PDMS must be cured to an appropriate viscosity, allowing the electrode tips to penetrate through the PDMS and contact the glass slide without capillary action. Meanwhile, the PDMS with suitable elastic properties can tightly wrap around the tips, preventing the insulation layer from depositing on the tips (Fig. 2d). The PDMS can cure rapidly at 85 °C; however, to achieve more precise control over PDMS hardness, the curing temperature was adjusted to 80 °C or lower. We inserted silicon-based microelectrode arrays into PDMS cured for varying durations to characterize the impact of different PDMS viscosities on the localized de-insulation method. When inserting the electrode into the PDMS, a proper force should be added to make sure the tips completely run through the whole thickness of the PDMS mask. Excessive force may cause damage to the electrode tips. Therefore, the minimum force causing damage to the electrode tip was tested under conditions more stringent than actual conditions. As shown in Fig. S1, the electrode arrays were placed tip-up on the platform of a force gauge. The force gauge descended slowly at a rate of 0.5 mm/min, making contact with the top of the electrodes and continuing to descend 1 mm before stopping. The minimum force that causes damage can be read from the results. From the statistical results 3 N is a safe force that will not cause tip damage in the actual operation process, 1 N( < 3 N) is enough to ensure the tips of a 10 × 10 array penetrate through the PDMS mask and stopping on the glass slide. To prevent the movement of the microneedle array, a weight with corresponding mass (100 g) is put on it during the parylene deposition process. Figure 3b illustrates the effects of varying curing times at 80 °C on the insertion of electrode arrays into PDMS. When the electrodes are inserted immediately after the PDMS has been spun, noticeable capillary action is observed. As the curing time increases to 5 min, the capillary effect becomes less discernible under an optical microscope. However, scanning electron microscopy (SEM) reveals a slight capillary action still present at 7 min. At 8 min, the PDMS reaches a semi-cured state, allowing the tips of the silicon-based microelectrode arrays to be easily inserted and encapsulated by the PDMS without any capillary action occurring. As the curing time extends, the hardness of the PDMS gradually increases, which hinders the penetration of the electrode tips upon full curing. Even if the electrode tips are inserted into the PDMS, the material fails to encapsulate them tightly. Therefore, PDMS cured at 80 °C for 8 min is more suitable for the localized de-insulation method.
Control fracture location to form de-insulated needle tips
As shown in Fig. 2e, f Parylene-C forms a seamless coating on both the microneedle array and the PDMS mask, except for the needle tips tightly inserted into the PDMS. When the microneedle array is pulled out from the mask, the Parylene-C film fractures, exposing the needles. However, the fracture location is uncertain if the adhesion between Parylene-C and the substrate is not designed rationally. Firstly, the adhesion of Parylene-C films on the metalized silicon needles must be sufficiently strong to prevent stripping during removal. To ensure this, silane A-174 was applied to the electrodes before Parylene-C deposition24. Secondly, Parylene-C deposited on the mask must also adhere firmly; otherwise, it may tear away from the mask. PDMS is chosen in the proposed methods because the adhesive force between Parylene-C and PDMS exceeds the breaking strength of Parylene-C25. Given that the adhesion of Parylene-C on both the microneedle and PDMS is greater than its breaking strength, the Parylene-C will fracture at the interface of the microneedle and PDMS. Precise cured, non-liquid PDMS is selected to avoid the risk of liquid PDMS climbing up the microneedles and filling the gaps between them due to surface tension or capillary action.
The optimized de-insulation process parameters are as follows: a 10:1 ratio of PDMS to curing agent was utilized, with a spin-coating speed of 1250 rpm for 50 s, followed by curing at 80 °C for 8 min, resulting in a PDMS thickness of around 50 μm. Subsequently, a 3 μm thick layer of Parylene-C was deposited. Table 1 presents the average non-uniformity of the electrode arrays (each has 10 × 10 arrays, totaling 700 recording sites) processed using the localized de-insulation method across seven trials. The needle tip exposure lengths were measured using scanning electron microscopy (SEM), and the standard deviation of these lengths was calculated, multiplied by 100, and divided by the average to characterize non-uniformity. Lower non-uniformity values indicate a higher consistency in the exposed needle tip lengths. Results showed a maximum non-uniformity of 5.22 ± 1.82% and a minimum of 2.32 ± 0.57%. Figure 3c displays the exposed needle tip lengths of four electrodes from the same batch, averaging 50 ± 0.77 μm. It is approximately equal to the thickness of the PDMS, and further confirmation through SEM observation demonstrates that applying a force of 1 N allows the tips of a 100-channel electrode array to contact the substrate without causing any damage to the tips. The local de-insulation method achieves a level of non-uniformity comparable to the method of using a photoresist mask21 followed by etching, while offering better time efficiency (Table 2). Figure 3d illustrates the exposure effect achieved through the local de-insulation method, while Fig. 3e shows that the Parylene-C film on the electrode array tips gradually thickens at the fracture point, reaching approximately 3 μm. To prevent uncured PDMS residue from remaining on the recording site interface, we conducted an experiment on a silicon wafer deposited with Cr/Au. Using the same parameters, PDMS was spin-coated onto the wafer and cured. After curing, the PDMS was peeled off, and the wafer was cleaned with acetone, ethanol, and deionized water. Subsequently, the resistivity of the wafer was measured 10 times each before and after spin-coating PDMS using the four-point probe method. The results showed that the average resistivity before spin-coating was 33.33 kΩ cm, and after spin-coating was 33.33 kΩ cm, with no significant difference between the two (Fig. S2). Additionally, the SEM of the electrode tips revealed no detectable residues. Therefore, it can be concluded that the local de-insulation method does not leave PDMS residue on the electrode tip interface.
Electrochemical characterization analysis of silicon-based neural microelectrode arrays
In vitro electrochemical impedance spectroscopy (EIS) and charge storage capacity (CSC) were employed to characterize the microelectrode arrays. The impedance of the Au interface and the platinum black modified interface of the silicon-based neural microelectrode arrays was measured over a frequency range of 1 Hz to 1 MHz. Given that the action potential duration of neurons is close to 1 ms, impedance at 1 kHz holds significant neurobiological relevance. At 1 kHz, the impedance of the Au interface electrode array is 1.36 MΩ, while the impedance of the platinum black interface is 33.2 KΩ. The impedance of the electrode interface decreased by two orders of magnitude after platinum black modification, exhibiting lower impedance compared to sputtered iridium oxide modifications21 (Fig. 4a and Table 2). We performed accelerated aging tests in vitro equivalent to 32 days of immersion at 37 °C Phosphate Buffered Saline solution. The results showed that the impedance changed little compared with that before aging. No delamination was observed at the Parylene‑C -needle interface at the needle tip (Fig. S3). CSC was calculated from cyclic voltammetry (CV) data obtained at a scan rate of 50 mV/s. A lower scan rate allows access to a larger conductive surface near the electrode tip26. At a scan rate of 50 mV/s, the CSC of the Au interface is 0.597 mC/cm², whereas the CSC of the platinum black interface is 85.7 mC/cm², indicating a significantly higher charge storage capacity for the platinum black modified interface (Fig. 4b).
a EIS of the Au interface and the platinum black modified interface. b CV of the Au interface and the platinum black modified interface. c The left image shows a 16-channel silicon neural microelectrode array with a single Omnetics connector, manufactured using a local de-insulation method and implanted in a rat. The right image shows a 96-channel silicon neural microelectrode array with three Omnetics connectors, designed for use in large animals. d Schematic of electrode recording point locations, and the spike signals recorded from each channel. e Filtered signal of Ch.14 after 300 Hz to 3000 Hz bandpass filtering. f Autocorrelation of Ch.14, bin=5 ms
In vivo Characterization of Silicon-Based Neural Microelectrode Arrays
The fabricated devices were implanted into the brains of rats to assess the performance of the silicon-based neural microelectrode arrays by detecting spike signals. Figure 4c shows a rat with a 16-channel (4 × 4 array) silicon-based neural microelectrode array implanted. The implanted electrode array was connected to the Open-Ephys system via Omnetics connectors for signal acquisition. Figure 4d illustrates the electrode recording sites and the processed spike signals from the 16 channels, with 15 channels successfully recording signals. After filtering, the average SNR of the 15 channels was 12.63 ± 6.64, with channel 14 having the highest SNR of 28.472 (Fig. 4e). This SNR is comparable to the signal recording capabilities of other electrodes (Table S1). The significant differences in the SNRs of the signals recorded by different channels are probably due to the varying positions of each channel after implantation and the varying levels of damage caused to their respective positions during the implantation process. Figure 4f presents the autocorrelation plot for channel 14, indicating that the recorded signals originate from a single neuron’s firing. Figures S4, S5 show the interspike interval histograms and autocorrelation plots for the remaining channels, further confirming that the recorded signals are spike signals.
Discussion
In this work, we introduce a novel etching-free microneedle tip exposure fabrication technique—the Local De-Insulation Method—and apply it to the production of silicon-based neural microelectrode arrays. This method improves the fabrication process by utilizing a vacuum glass bonding and sintering technique for electrode substrates and employing a platinum black-modified interface. While ensuring consistent needle tips, the preparation process is considerably simplified. The fabricated silicon-based microneedle neural microelectrode arrays were implanted in rats, resulting in spike signal detection across nearly all channels.
Although Donghak Byun et al. previously utilized photoresist as a masking material, their approach involved immersing electrodes in the photoresist before curing, which caused capillary action between the photoresist and silicon needles, leading to inconsistent tip exposure lengths27. In severe cases, the liquid masking material could penetrate the base of the microneedle array due to surface tension. Additionally, since the adhesion strength of Parylene-C to photoresist is lower than its fracture strength, the removal of the electrode may result in Parylene-C detaching from the photoresist first, leaving varying amounts on the needle tips. To mitigate adverse effects from these residues upon insertion into brain tissue, reactive ion etching (RIE) is typically required; however, this removal process may exacerbate inconsistencies in tip exposure lengths.
In contrast, the local de-insulation method requires spin-coating PDMS onto the underlying substrate to an appropriate thickness and curing it to the desired viscosity, maintaining the elasticity of the PDMS to protect the electrode tips while preventing capillary action. By applying an appropriate force, the electrode tips can penetrate through the PDMS, ensuring contact with the underlying substrate without being damaged. When the needle tips are inserted into the PDMS, the PDMS tightly wraps around them, preventing Parylene precursor molecules from entering the protected area during the Parylene-C depositing process. As a result, no Parylene-C is deposited at the tip-PDMS interface. It is this elastic compression that keeps Parylene-C isolated from the needle tips inserted into the PDMS. Moreover, when the electrode is withdrawn from the PDMS, no PDMS remains on the surface of the tips. During Parylene-C deposition in this region, thickness decreases gradually near the needle/PDMS interface (as shown in the insert of Fig. 2e), resulting in the thinnest layer at the depression’s center. Furthermore, the adhesion strength of Parylene-C to both PDMS and silicon needles exceeds its fracture strength, ensuring that upon withdrawal, the Parylene-C at the deepest point of the depression, subjected to greater stress, fractures preferentially. Thus, the tips of silicon-based neural microelectrode arrays removed from PDMS exhibit no excess Parylene-C, with the film thickness progressively increasing from the tip, reaching approximately 3 μm. It is important to note that the thickness of Parylene-C should not be too thick, as excessive thickness would make it difficult to determine the fracture location, potentially causing the Parylene-C to detach from the electrode. In addition, the PDMS should not be too thin, as overly thin PDMS lacks sufficient elasticity to provide tight protection for the electrode tips.
The optimization parameters resulted in a PDMS thickness of approximately 50 μm. In four randomly selected electrode arrays (each comprising a 10 × 10 configuration, totaling 400 recording sites), the average exposed electrode tip length was found to be 50 ± 0.77 μm. The slight discrepancies between the ideal and actual exposed lengths can be primarily attributed to minor depressions formed during the insertion of electrodes into the partially cured PDMS and variations during the PDMS spin-coating process. Furthermore, the consistency of tip exposure across each array is high, ensuring that signal quality remains unaffected. Future efforts will focus on optimizing the etching process to enhance the uniformity of electrode pillar lengths, thereby further refining the precision of the local de-insulation method and bringing the actual exposed lengths closer to the ideal specifications.
Materials and methods
Materials
Silicon wafer (1800 μm thick, 100 mm diameter, highly doped, n-type, <100> orientation, double-side polished, resistivity of 0.01–0.1 Ω-cm, commercially available), BF33 glass (100 mm diameter, 100 μm thick, commercially available), insulated gold wire (X-Wire™ INSULATED gold bonding wire, Microbonds Inc., USA), silicone (MED-4244, NuSil, USA), Polydimethylsiloxane (Dow Corning 184, Dow Corning, USA), Silane coupling agent A-174 (commercially available).
Microneedle array root fabrication
The 1800 μm thick silicon wafer was first immersed in a standard cleaning solution (H2SO4:H2O2 = 4:1) and cleaned at 120 °C for 15 min, followed by thorough rinsing with deionized water. The wafer was then placed in a solution of NH4OH:H2O2:H2O = 1:1:5 and cleaned at 70–80 °C for 15 min, followed by another rinse with deionized water. Subsequently, the wafer was treated in a solution of HCl:H2O2:H2O = 1:1:6 at 70–80 °C for 15 min and rinsed with deionized water. Finally, the wafer was dipped in an HF:H2O = 1:50 solution for 30 s and thoroughly rinsed with deionized water. After cleaning, the wafer was dried in an oven at 120 °C for 30 min. Once dried, a 2 μm thick SiO2 film was grown on the wafer surface. Photolithography was then performed using AZ4620 photoresist, applied at 3000 rpm. The photoresist was prebaked at 95 °C for 10 min, exposed for 200 s, developed for 5 min, and post-baked at 110 °C for 10 min. The wafer was then etched to a depth of 500 μm. Following etching, the wafer was cleaned in a standard solution at 120 °C for 15 min, rinsed with deionized water, and subsequently cleaned with acetone, ethanol, and deionized water.
Microneedle array backboard formation
Initially, the etched silicon wafers undergo thermal oxidation to grow a 500 nm thick layer of silicon dioxide. Subsequently, both BF33 glass and silicon wafers are thoroughly cleaned. The glass is then bonded to the silicon wafer in a vacuum environment using anodic bonding, ensuring that the silicon pillars remain exposed. After bonding, the samples are protected with nitrogen in a tube furnace and annealed at 1000 °C for 2 h to ensure complete infiltration of the molten glass around the silicon pillars, forming a stable glass/silicon bond. Finally, the silicon wafers are polished to guarantee the full exposure of the silicon pillars.
Microneedle array bonding layer formation
On the backside of the bonded silicon wafer, a layer of AZ4340 photoresist is first spin-coated with parameters of 800 rpm for 6 s, followed by a higher speed of 3500 rpm for 20 s. After spin-coating, the wafer is baked at 110 °C for 150 s, then subjected to exposure. Following exposure, the wafer is baked at 105 °C for 135 s and then developed for 135 s. After development, a Cr/Au thin film is deposited using PVD. The Cr layer is 10 nm thick and the Au layer is 100 nm thick. After deposition, the wafer undergoes a lift-off process and is thoroughly cleaned with acetone, ethanol, and deionized water.
Microneedle array pillar formation
On the non-glass-filled side (the front side), silicon wafers are cut using a Disco dicing saw (Z09-SD2000-Y1-90). Initially, 11 cuts are made per unit on the silicon wafer with a spacing of 400 μm between cuts. After completing these cuts, the wafer is rotated 90 degrees, and an additional 11 cuts are made with the same 400 μm spacing. The dicing saw is configured to just contact the glass, ensuring all cuts achieve a depth of 1300 μm, thus providing electrical isolation between each pillar and its neighboring pillars. This cutting process not only creates a 10 × 10 electrode array but also results in fin-like structures and corner pillars. After cutting, the wafer is thoroughly cleaned with acetone, ethanol, and deionized water.
Microneedle array needle formation
Wet etching is employed to sharpen the etched silicon pillars into needle-like electrodes with sharp tips. Initially, the wafers containing the silicon pillars are immersed in a solution of HF (49%) and HNO3 (69%) in a 1:19 ratio for dynamic and static etching steps, resulting in a uniform array of needle-like electrodes28. Following the sharpening of the silicon pillar tips, the electrodes are thoroughly rinsed with acetone, ethanol, and deionized water.
Microneedle array wiring formation
To deposit a Cr/Au metal layer on the electrode tips, a photolithography masking technique combined with PVD was employed29. First, four layers of AZ4620 photoresist were sequentially spin-coated at 500 rpm, 400 rpm, 300 rpm, and 200 rpm. The wafer was then maintained under vacuum for 30 min to remove bubbles. Next, the wafer was prebaked at 95 °C for 5 min, followed by 30 s of exposure and a development step lasting 2.5 min. After development, the wafer was baked at 50 °C for 7 h. Once the baking was completed, a 10 nm Cr layer and a 100 nm Au layer were deposited using PVD. Finally, the wafer was thoroughly cleaned with acetone, ethanol, and deionized water.
Silanization of microneedle array
First, prepare the silanization solution by mixing isopropanol (IPA), deionized water (DI), and silane coupling agent A-174 in a volumetric ratio of 100:100:1. Stir the mixture for 30 s and allow it to stand for 2 h. Next, immerse the electrodes in the solution for 25 min. After immersion, remove the electrodes and air-dry them for 15–30 min. Following the air-drying, briefly immerse the electrodes in IPA for 15–20 s. Finally, remove the electrodes and blow-dry them with nitrogen for 60 s.
Microneedle array recording site formation
The PDMS prepolymer and curing agent are mixed in a 10:1 weight ratio, thoroughly stirred, and degassed in a vacuum for 30 min. The mixture is then spin-coated on a clean glass slide at 200 rpm for 20 s and 1250 rpm for 50 s, followed by curing at 80 °C for 8 min. A force of varying magnitude is applied depending on the number of electrode arrays to ensure that the silanized electrodes are inserted face down into the PDMS without damaging the needle tips. Following the deposition of 3 μm of parylene, the electrodes are removed. Then electrodes are cleaned with acetone, ethanol, and deionized water.
Microneedle array formation
Using a wire bonder (WEST BOND, USA), insulated gold wires with a diameter of 25 μm were employed to connect the microneedle array to the PCB. After completing the bonding, the wires were twisted together into a bundle and coated with silicone mixed in a 10:1 (Part A: Part B) ratio. Finally, the coated wires were baked at 150 °C for 1 h.
Microneedle array interface modification
Using an electrochemical workstation (CHI 660E, CH Instrument, China), the microneedle arrays were modified with platinum black. The deposition was performed under constant voltage at −0.8 V for a duration of 40 s.
Micromorphological Characterization
The exposure of the needle tips was examined using a scanning electron microscope (FlexSEM 1000 II, Hitachi High-Technologies Corporation, Japan), and the length of the exposed needle tips was measured.
PDMS thickness in the local de-insulation method
PDMS polymer and curing agent were mixed at a 10:1 ratio and placed under vacuum for 30 min. PDMS was first spin-coated at 200 rpm for 20 s, then divided into 10 groups, with each group spin-coated at speeds of 500, 600, 700, 800, 900, 1000, 1100, 1200, 1300, and 1400 rpm for 50 s. The samples were subsequently cured for 8 min. The cross-sectional thickness was then observed under a microscope.
PDMS viscosity in the local de-insulation method
PDMS polymer and curing agent were mixed at a 10:1 ratio and placed under vacuum for 30 min. PDMS was first spin-coated at 200 rpm for 20 s, followed by 800 rpm for 50 s. The samples were then divided into 8 groups, each cured at 80 °C for 1, 2, 3, 4, 5, 6, 7, and 8 min, respectively. Silicon-based neural microelectrode arrays were subsequently inserted into the PDMS, and the effect of capillary action on the localized de-insulation method was observed.
The resistivity of PDMS before spin-coating and after peeling was tested using the four-point probe method
10 nm Cr and 100 nm Au were deposited on clean silicon wafers, followed by electrical resistivity testing using the four-point probe method. After the testing, PDMS was spin-coated and cured using optimized parameters. After the PDMS was peeled off, its electrical resistivity was tested again using the four-point probe method.
Electrochemical properties
Electrochemical performance of the microneedle array was recorded using a computer-controlled electrochemical workstation (CHI 660E, CH Instrument, China), including measurements of CV and EIS.
In vivo studies
The Animal Care and Use Committee (ACUC) at CIBR approved the animal care and experimental procedures (AP# CIBR-IACUC-037). At the beginning of the experiment, Wistar rats were anesthetized with 2–3% isoflurane and then positioned in a stereotaxic frame. During the experiment, the rat’s rectal temperature was kept at 37–38 °C using a heating pad. A craniotomy was performed on the rat’s motor cortex, creating a window approximately 2 × 2 mm in size. After the dura mater was removed, a micro-manipulator was used to insert a 16-channel electrode into the brain at a rate of approximately 1 mm/min30. Once the electrode was in place, the ground and reference wires were coiled around the skull screws three times. Penicillin was applied to cover the electrode and craniotomy site to prevent direct contact between dental cement and the brain. Finally, dental cement was applied to the area where the scalp was incised and allowed to set. Post-surgery, the rats received continuous antibiotic injections for 3–4 days to prevent infection.
Signal analysis
The microneedle array is connected to the Open-Ephys system via an Omnetics interface for signal acquisition. Following data collection, the signals are processed using Plexon Offline Sorter and NeuroExplorer to extract spike signals for each channel.
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Acknowledgements
This work was supported by the National Natural Science Foundation of China under grant 62071447 and the National Key R&D Program of China under grant 2022YFF1202303.
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X.Z., C.R.W., D.G.Z. Z.X.G., and W.H.P. conceived the idea and designed the research. X.Z., C.R.W., X.W.Y., G.W.H., J.N., and Q.G. prepared the materials and fabricated the electrodes. X.Z. and D.G.Z. performed the micromorphology experiments and analysis. X.Z. and C.R.W. characterized the residue tests and mechanical strength tests. X.Z. performed the electrical experiments and analysis. X.Z., R.Y.T., and J.F.Z. performed the animal experiments and analysis. X.Z. and Y.J.W. performed the signal analysis. All the authors contributed to the writing of the paper. X.Z. and C.R.W. contributed equally to the article.
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Zhao, X., Wei, C., Zhu, D. et al. A local de-insulation method and its application in neural microneedle array. Microsyst Nanoeng 11, 103 (2025). https://doi.org/10.1038/s41378-025-00922-6
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DOI: https://doi.org/10.1038/s41378-025-00922-6






