Superconductor logic families1,2,3,4,5,6 can operate with small power dissipation and have thus been studied to develop various energy-efficient systems. To suppress errors caused by thermal noise at a typical operating temperature of 4.2 K, the critical currents of Josephson junctions (JJs) in superconductor logic families are set to 100–300 µA7,8 using Nb fabrication processes9,10 with a critical current density (Jc) of ~10 kA/cm2. This ensures that the Josephson energy (IcΦ0/2π = 3.29 × 10−20J for Ic = 100 µA) is much larger than thermal energy (kBT = 5.80 × 10−23J for T = 4.2 K), where Ic is the critical current of a JJ, Φ0 is a flux quantum, kB is the Boltzmann constant, and T is temperature. Low-error-rate, high-speed superconductor digital circuits have been demonstrated at 4.2 K3,11,12 using various logic families, such as rapid single-flux-quantum (RSFQ) logic1, reciprocal quantum logic3, and adiabatic quantum-flux-parametron (AQFP)5,13 logic.

In some applications using superconductor logic, smaller critical current values are preferable. Qubit interface circuits14,15,16,17,18 need to operate with extremely small power dissipation at sub-Kelvin temperature because of the poor cooling power of a dilution refrigerator, which is only ~10 µW at ~10 mK19. Thus, the critical current values of JJs in qubit interface circuits should be reduced to lower power dissipation, as far as IcΦ0/2π ≳ 1,000kBT at 10 mK (i.e., Ic ≳ 0.4 µA). Stochastic electronics20,21,22,23,24 perform stochastic operations, such as random number generation, by utilizing thermal fluctuations and typically use error-tolerant data formats25. Thus, the critical current values of JJs in stochastic electronics should also be reduced to easily induce stochastic operations and lower power dissipation (with errors accepted to some extent), as far as IcΦ0/2π ≳ kBT at 4.2 K (i.e., Ic ≳ 0.2 µA). The above discussion suggests that both qubit interface circuits and stochastic electronics should be designed using a low-Jc fabrication process with a minimum critical current of ~1 µA. In practice, too small critical current values are not preferable because very large inductors are required to design digital circuits; for instance, a 1-µA JJ requires a huge inductance L of ~2 nH to keep LIc ~ Φ0. Therefore, we assume that the appropriate minimum Ic value is ~10 µA for the above two applications.

In this study, we develop a low-Jc fabrication process dedicated to the design of qubit interface circuits and stochastic electronics, which we call the AIST 1 kA cm−2 Nb planarized process (1KP). We selected a Jc value of 1 kA cm−2 to achieve the minimum Ic value of 10 µA for the minimum junction size of 1 µm2 in our fabrication facility. Other research groups also reported low-Jc (~1 kA cm−2 or even smaller) fabrication processes for qubit interface circuits15,17,26,27,28,29,30. In contrast, the 1KP is fully compatible with our standard RSFQ and AQFP designs7,31,32,33,34. Furthermore, we actually design RSFQ and AQFP cell libraries for the 1KP and demonstrate various logic cells fabricated by the 1KP. In the following sections, we first explain the device structure of the 1KP and measurement results for the characteristics of JJs fabricated by the 1KP. We then explain RSFQ and AQFP cell libraries using the 1KP, also revealing the advantages of using the 1KP (i.e., power dissipation and the amount of supply currents can be balanced for cryocooler applications). Finally, we present measurement results for RSFQ and AQFP circuits fabricated by the 1KP.

Results and discussion

Device structure and specifications of the 1KP

The AIST 10 kA cm−2 Nb planarized high-speed standard process (PHSTP)34 was developed for RSFQ and AQFP logic families by using the caldera planarization technique, which was developed for a nine-layer Nb process called the ADP29. After that, several modified versions of the PHSTP have been developed depending on target applications. One is the 250P with a low Jc of 250 A/cm2, which was developed to design qubit interface circuits using RSFQ logic29. Another is the 1KP for qubit interface circuits and stochastic electronics using RSFQ and AQFP logic.

Figure 1 shows a device structure of the 1KP, which is almost the same as that of the PHSTP. Table 1 shows comparison of PHSTP, 250P, and 1KP specifications. In the 250P and 1KP, the resistor material was changed from the Mo film to the Ti/Pd/Ti tri-layer film to obtain resistivity at 10 mK, which was originally introduced to the development of quantum annealing devices35. Thin Ti films are inserted in both sides of the Pd film to improve adhesion between Pd and SiO2. The target 1.2 Ω sheet resistance is obtained for a Pd thickness of approximately 50 nm. The Jc of Nb/AlOx/Nb junctions depends on the thickness of AlOx, which is controlled by oxidization pressure and time. The Jc of 1 kA/cm2 is obtained by a pressure of 15–17 Torr for Ar and 1%-O2 mixture gas and an oxidization time of 120 min.

Characteristics of Josephson junctions fabricated by the 1KP

To evaluate junction characteristics, multiple test elementary groups (TEGs), each with 1000 serially connected JJs, were fabricated by the 1KP. Table 2 shows a summary of the junction characteristics for the wafer with a lot number of 1KP001 No. 1, where JJs with seven different sizes were measured at 4.2 K. By the extrapolation for the measured Ic values vs. junction sizes, Jc and shrinkage values were calculated to be 1248 A/cm2 and 0.244 μm, respectively, which are ~20% larger than the target values shown in Table 1. The junction area was calculated with the shrinkage value of 0.244 μm taken into account. The standard deviations of Ic scattering for small junctions (1.2, 1.6, and 2.2-µm JJs) are relatively large, compared to those for the PHSTP34. Figure 2(a) shows the current-voltage (I-V) characteristics of a JJ array comprising 1000 serially connected 1.2-μm JJs, which indicates that thermal noise at 4.2 K strongly suppressed the critical currents of small JJs and resulted in large Ic scattering. Therefore, the Ic scattering for small JJs will be improved by lowering operating temperature to 10 mK. On the other hand, the influence of thermal noise at 4.2 K on large junctions (4.2, 5.2, and 6.2-µm JJs) was relatively small, as indicated by the I-V characteristics of a JJ array comprising 1000 serially connected 5.2-μm JJs shown in Fig. 2(b). Excellent junction characteristics were observed for large junctions; the standard deviation for Ic scattering was less than 1%, IcRn was more than 1.6 mV, and IcRsg was more than 60 mV, where Rn is the resistance at 4.0 V due to normal currents and Rsg is the resistance of the sub-gap region due to quasi-particle currents.

Fig. 1
figure 1

Device structure of the 1KP. JJ: Nb/AlOx/Nb junction; GP: Nb ground plane; BAS, COU, and CTL: Nb wiring layers; RES: Ti/Pd/Ti resistor (thickness: 2 nm/50 nm/4 nm); GC, RC, BC, JC, and CC: contacts between Nb layers. SiO2 thickness between GP and RES: 150 nm; that between RES and BAS: 150 nm; JJ upper layer thickness: 150 nm; Nb2O5: anodized Nb; Al2O3: anodized Al; AlOx: thermally oxidized Al.

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Table 1 Comparison of PHSTP, 250P, and 1KP specifications.
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Table 2 Summary of the junction characteristics measured at 4.2 K for the wafer with a lot number of 1KP001 No. 1.
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RSFQ cell library using the 1KP

We developed an RSFQ cell library for the 1KP based on that for the PHSTP, in accordance with the design guidelines established in the CONNECT cell library31. As a first demonstration, we designed a minimal set of RSFQ cells: Josephson transmission lines (JTLs), a pulse splitter (SPL), an SPL with a three-fanout (SPL3), a confluence buffer (CB), a D flip-flop (DFF), a resettable DFF (RDFF), a dual-output DFF (D2FF), a non-destructive readout (NDRO), an NDRO with a complementary output (NDROC), a NOT gate, an XOR gate, a NOR gate, an OR gate, an AND gate, a T flip-flop (TFF), a resettable TFF (RTFF), a T1 flip-flop (T1FF), and DC/single-flux-quantum (SFQ) and SFQ/DC converters. Other logic cells will be designed in future work. Figures 3 (a) and (b) respectively show the layout and schematic diagram of the JTL cell. The critical currents of Josephson junctions (J1 and J2) are 21.3 µA, which is ~1/10 of those in conventional designs7,31,34. The circuit parameters were extracted using InductEx36 and are given in the caption of Fig. 3, where each inductance was designed to be ~10 times larger than that of conventional designs to keep the LIc product constant. The McCumber parameter37 (βc) for each junction was set to 1. The bias voltage was reduced from a typical value of 2.5 mV to 0.8 mV to lower power dissipation, as explained later. The maximum operating frequency was estimated to be ~20 GHz29, which is high enough for qubit interface circuits and stochastic electronics. This maximum operating frequency is relatively conservative29, so RSFQ cells using the 1KP might operate at higher frequencies. The bias-feeding lines were covered with superconducting shield (SUSHI) structures38 to suppress magnetic fields induced by bias currents. The unit cell size was set to 60 μm × 60 μm.

Fig. 2
figure 2

I-V characteristics of (a) a 1.2-μm-JJ array and (b) a 5.2-μm-JJ array, each comprising 1000 serially connected junctions (lot number: 1KP001 No. 1).

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Fig. 3
figure 3

RSFQ JTL cell. (a) Layout. Dimensions are 60 μm (width) × 60 μm (height). (b) Schematic diagram. Lin = 7.36 pH, L1 = 24.3 pH, L2 = 47.8 pH, L3 = 17.3 pH, Rb = 26.7 Ω, Vb = 0.8 mV. The critical currents of J1 and J2 are 21.3 μA.

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We show that RSFQ cells using the 1KP can operate with very low power dissipation. The power dissipation of an RSFQ cell is given by IbVb = 0.7nIcVb, where Ib is the bias current, Vb is the bias voltage (assuming that each junction is biased by a current equal to 70% of its Ic value), and n is the junction count. This is because the static power dissipation caused by bias resistors is dominant in the power dissipation of RSFQ logic. In this study, Ic values in RSFQ cells were set to 1/10 values of conventional designs. Furthermore, the Vb value was reduced to 0.8 mV, which is 32% of that for conventional RSFQ cells (2.5 mV). This is because the height of an SFQ pulse decreases with decreasing Jc, so RSFQ circuits for the 1KP can operate with a low bias voltage. Consequently, the power dissipation of RSFQ cells using the 1KP is only 3.2% of that of conventional RSFQ cells. Here we clarify the impact of the 1KP on the energy efficiency of RSFQ-based qubit interface circuits and stochastic electronics. For instance, the power dissipation of a microwave pulse generator39 for qubit control can decrease from 51.7 µW to 1.65 µW, and that of a sigmoid function generator40 for superconducting neural networks can decrease from 1.7 µW to 54 nW. The power dissipation of RSFQ circuits using the 1KP can be further reduced by introducing low-power RSFQ techniques, such as energy-efficient RSFQ logic2, which will be investigated in future work.

AQFP cell library using the 1KP

We developed an AQFP cell library for the 1KP by adopting the minimal design32, in which logic gates are designed by arraying four types of building block cells (buffer, inverter, constant, and branch cells). Figures 4 (a) and (b) respectively show the layout and schematic diagram of the buffer cell, which is the most fundamental AQFP gate that transmits input data to an output port. The critical current of paired Josephson junctions (J1 and J2) is 20 µA, which is less than half of that in previous designs (50 µA)32,33,34. The other circuit parameters were extracted using InductEx and are given in the caption of Fig. 4, where the characteristic impedance of the excitation lines (Lx for applying ac excitation flux with a 0.5Φ0-amplitude by Ix; Ld for applying DC offset flux of 0.5Φ0 by Id) was designed to be 50 Ω41. The entire layout was symmetrically designed to avoid unwanted parasitic magnetic coupling32 and has dimensions of 40 μm (width) and 45 μm (height). A moat42 for mitigating the effect of flux trapping43,44 was placed at the center of the output inductor Lout so that the magnetic fluxes applied by trapped fluxes to Lout would be canceled out45. As with the buffer cell for a 2.5 kA cm−2 process46, shunt resistors were added to J1 and J2 such that βc for each junction became 1. This is because the sub-gap resistance of each Josephson junction is large (i.e., intrinsic damping is weak), as shown in Table 2, and shunt resistors are required to operate AQFP circuits at ~5 GHz. The maximum operating frequency was estimated to be ~30 GHz47, which is high enough for qubit interface circuits and stochastic electronics. The inverter and constant cells were also designed based on the buffer cell shown in Fig. 4 .

Fig. 4
figure 4

AQFP buffer cell. (a) Layout. Dimensions are 40 μm (width) × 45 μm (height). (b) Schematic diagram. Lin = 1.69 pH, L1 = L2 = 2.40 pH, Lq = 19.1 pH, Lout = 76.1 pH, kout = 0.527. The critical currents of J1 and J2 are 20 μA.

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We clarify the benefits and drawbacks of AQFP circuits designed using the 1KP. A benefit is that the amplitude of excitation currents can be reduced because of large coupling between AQFP circuits and excitation lines. For the buffer cell shown in Fig.4, J1 and J2 have a small critical current of 20 µA, so the inductance of L1 and L2 was set to a larger value than previous design. This resulted in large mutual inductances between Lx and L1 (L2) and between Ld and L1 (L2), and the amplitudes of Ix and Id were respectively reduced to 315 µA and 371 µA, which are only 40% and 33% of those for a conventional buffer cell33. This is important in some applications using cryocoolers, such as qubit interface circuits, because a large supply current can generate serious Joule heating through parasitic resistances and/or attenuators inside a cryocooler. A drawback of using the 1KP is that the energy dissipation of AQFP circuits is relatively large, regardless of small critical currents. The energy dissipation per switching of an AQFP buffer is given by13 Esw ~ 2Φ02/Rτx, where R is the equivalent resistance of the sub-gap resistance Rsg and shunt resistor Rs, and τx is the rise/fall time of the excitation current. This indicates that the energy dissipation is determined by the equivalent resistance, rather than critical currents. In the previous design using a 10 kA cm−2 process33, Josephson junctions were not damped by shunt resistors because of relatively strong intrinsic damping; thus, Esw ~ 2Φ02/Rsgτx ~ 4 × 10−22J assuming τx = 100 ps and Rsg = 200 Ω for Ic = 50 µA. On the other hand, for the 1KP, Josephson junctions are damped by shunt resistors, so Esw ~ 2Φ02/Rsτx ~ 7 × 10−21J assuming τx = 100 ps and Rs = 12.8 Ω for Ic = 20 µA (βc = 1). The actual Esw value of the AQFP buffer cell for the 1KP was calculated by JoSIM48 and found to be 8.0 × 10−21J for 5 GHz operation.

Fig. 5
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Micrograph of a test chip for the RSFQ cell library, including 17 logic cells. The chip size is 5 mm × 5 mm.

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Fig. 6
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(a) Measurement waveforms of a JTL test circuit at 100 kHz in liquid helium. The input signal (high voltage: logic 1; low voltage: logic 0) is applied to the DC/SFQ converter, where an SFQ pulse is generated at the rise edge of the input signal. The output signal is observed by the SFQ/DC converter, where each rise or fall edge indicates a logic 1. The output signal was amplified by a room-temperature amplifier with a 40-dB gain. (b) Measurement results of operating bias margins, which are normalized to a bias voltage of 0.8 mV.

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While the energy dissipation of the AQFP cell increased using the 1KP, the energy dissipation is still very small compared to that of typical superconductor logic families (10−19J to 10−17J)1,2,4; also, the energy dissipation can be further reduced by increasing βc values. More importantly, with the low Jc value, a wide range of Ic values (10–50 µA) are available to balance the power dissipation and amount of supply currents for cryocooler applications. Another important point is that the power dissipation of some AQFP/RSFQ hybrid systems, such as a qubit calibration circuit16 and neuron circuit40, can be significantly reduced using the 1KP because the entire power dissipation of hybrid systems is typically dominated by the RSFQ parts.

Measurement results

We fabricated RSFQ and AQFP logic cells using the 1KP and demonstrated the cells at 4.2 K in liquid helium using a low-frequency dipping probe with multiple magnetic shields. The operating frequencies of microwave pulse generators for qubit interface circuits are ~5 GHz18,39, so we will test RSFQ and AQFP circuits using the 1KP at frequencies in the gigahertz range in future work.

Fig. 7
figure 7

Micrograph of AQFP circuits that include a buffer chain, an AND gate, an XOR gate, and a full adder. The entire circuit was powered and clocked by paired ac excitation currents (Ix1 and Ix2) and a DC offset current (Id).

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Fig. 8
figure 8

(a) Measurement waveforms obtained at 100 kHz in liquid helium. All the circuits operated correctly. (b) Measurement and simulation results of operating margins, where thermal noise was not taken into account in the simulation.

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Demonstration of RSFQ cells

Figure 5 shows a micrograph of a test chip for the RSFQ cell library fabricated by the 1KP, which includes the above-mentioned 17 logic cells. DC/SFQ and SFQ/DC converters were used as input and output interfaces between each logic cell and room temperature electronics. We tested the logic cells at a low frequency (100 kHz) and found that 13 cells operated correctly. Figure 6 (a) shows measurement waveforms of the JTL, and Fig. 6 (b) shows measurement results of operating margins regarding the bias voltage, normalized by the design value (0.8 mV). The bias margins shifted to a higher region because Jc of the fabricated chip was larger than the design value by ~20%. All the cells except for NOT and OR gates operated with wide bias margins of more than 60%, but the NOT and OR gates still exhibited reasonably wide bias margins of more than 35%. Unfortunately, the AND, NOR, TFF, and T1FF cells did not operate correctly. As for the AND gate, there were some mistakes in the parameter design and layout. For the other unfunctional cells, error rates were too high to evaluate bias margins due to thermal noise. This indicates that some cells require design improvements.

Demonstration of AQFP cells

Figure 7 shows a micrograph of AQFP circuits fabricated by the 1KP. The circuits include a buffer chain, an AND gate, an XOR gate, and a full adder. The circuits were powered and clocked by a pair of sinusoidal excitation currents (Ix1 and Ix2) with a phase separation of 90° and a DC offset current Id. In this way, logic operations were performed with a phase separation of 90°33,49. Ibuf is the input current for the buffer chain; Iina and Iinb are the input currents for the AND gate, XOR gate, and full adder; and Iinc is the input current for the full adder. The amplitude of Ibuf, Iina, Iinb, and Iinc was 10 µA. Vbuf, Vand, and Vxor are the output voltages for the buffer chain, AND gate, and XOR gate, respectively; and Vcout and Vsum are the output voltages representing the carry-out and summation for the full adder, respectively. The output voltages were generated by DC superconducting quantum interference devices (SQUIDs) coupled to AQFP buffers5. Figure 8 (a) shows measurement waveforms of the AQFP circuits at 100 kHz, and Fig. 8 (b) compares measured and simulated operating margins for Ix1 and Ix2, where thermal noise was not taken into account in the simulation. Compared to the simulated margins, the measured margins may have decreased because the critical current of Josephson junctions (20 µA) was small for error-free operation at 4.2 K; however, this is not problematic for our purpose since qubit interface circuits operate at much lower temperatures, and stochastic electronics accept errors to some extent.

Conclusions

We developed the 1KP for the design of qubit interface circuits and stochastic electronics, and developed RSFQ and AQFP cell libraries using the 1KP. The power dissipation of RSFQ logic using the 1KP was reduced to 3.2% of that for conventional RSFQ logic by reducing the Ic values of Josephson junctions and bias voltage. Also, the amount of supply currents for AQFP circuits was reduced to ~40% of that for conventional AQFP circuits due to large mutual inductances between AQFP gates and excitation lines. These two points are beneficial on the development of qubit interface circuits and stochastic electronics. We demonstrated both RSFQ and AQFP circuits fabricated by the 1KP at 4.2 K. Our next step is to test the circuits at even lower temperatures such as 10 mK to clearly show that RSFQ and AQFP logic using the 1KP can be used for qubit interface circuits and stochastic electronics.