Introduction

One of the primary objectives of the smart grid is to increase the flexibility and controllability of the power system. The solid-state transformer (SST) is a modern technology that enables efficient and controllable power flow in distribution grids. It consists of power electronic converters (PECs) and one or more medium-frequency (MF) transformers that have lower weight and volume than traditional low-frequency transformers (LFTs). In addition to providing LFT functionalities such as voltage matching and galvanic isolation of the primary and secondary sides, the SST also provides other functionalities such as bidirectional power flow control, harmonics reduction, integration of distributed energy resources (DERs), voltage stabilization, frequency regulation, power quality improvement, and fault current reduction1,2,3,4,5,6.

SSTs based on the number of power conversion stages are categorized into four different configurations: single-stage (ac-ac)7,8,9, two-stage (ac-dc-ac) with an LVDC link or HVDC link10,11,12, and three-stage (ac-dc-dc-ac) with an LVDC link and an HVDC link13,14,15. The most preferred configuration for smart grid applications is the three-stage SST. This configuration includes two decoupled DC links at both the MV and the LV sides. It can compensate grid disturbances and allow the direct integration of DERs to the grid either at the LV or the MV side16,17,18,19.

In smart grid applications, the voltage and current of SSTs can reach several kilovolts and kiloamperes. This makes it impractical to use a single-module converter with conventional low nominal value semiconductor switches. Semiconductor switches with high nominal values are very expensive and have high switching losses at high switching frequencies. To address this challenge and enhance the power and voltage of the converter for the DC-DC stage, cascade modular input series-output parallel (ISOP) converters are one of the most widely proposed and developed structures20,21,22. Modular converters enable the use of switches with low nominal voltage values, which have low on-state resistance to enhance overall efficiency. Additionally, using a smaller capacitor and inductor increases the power density of the converter and improves its dynamic response performance. These converters facilitate the converter’s thermal design because each modular converter’s basic module transfers only a portion of the total power. This approach also enhances the system’s overall reliability by reducing thermal and electrical stresses on the converter components. Additionally, the modular structure reduces the time and cost of the converter design process and allows for easy expansion of the converter’s power23,24.

Based on various studies, the dual active bridge (DAB)25,26, multiple active bridge (MAB)27,28, series resonant converters (SRCs)29,30, and multiple active bridge- series resonant converters (MAB-SRC)31,32 are the most suitable topologies for use as basic modules of modular SSTs. The DAB converters present bidirectional power transfer, wide voltage range capability, zero-voltage switching (ZVS) operations, and a simple control method33. MAB converters offer the same functionality as DAB converters, with some, such as asymmetrical quadruple active bridge (AQAB) converters, requiring fewer modules, resulting in decreased costs and improved efficiency34,35. Compared to DAB converters, SRC converters have higher efficiency and lower complexity; however, they cannot control power flow, which is a notable deficit36. The MAB-SRC DC-DC converter integrates the characteristics of both MAB and SRC topologies, resulting in higher overall efficiency compared to MAB and SRC32,35.

This paper presents and analyzes a reduced switch-multiple active bridge (RS-MAB) DC-DC converter as a building block of a three-stage modular solid-state transformer (SST), aiming to reduce both cost and size while maintaining the transferred power.

The phase-shift modulation (PSM) and triangular current modulation (TCM) techniques, which were previously utilized in DAB and QAB converters37,38, can also be implemented in the RS-MAB to modulate the converter. The PSM provides zero-voltage switching (ZVS) turn-on for the switches. However, this feature depends on the relationship between the input and output voltages and the load. Specifically, at light loads, ZVS can be lost. Another drawback of PSM is the high level of circulating reactive power in the high-frequency transformer. In the DAB converter, TCM enables zero-current switching (ZCS) turn-on for all switches and ZCS turn-off for six switches, and it reduces circulating reactive power. However, the root-mean-square (rms) current on the transformer and semiconductors can increase compared with that of the PSM39,40. In this article, the TCM method has been developed and used for the proposed converter modulation, considering that the SST load can vary from light to the rated load.

Construction and operation principle

The general topology of the RS-MAB converter is shown in Fig. 1. Like MAB converters, it consists of m bridges on the primary side and n bridges on the secondary side, connected via a one-phase and a k = m + n winding MF transformer. Except that the switches of the bridges between the two windings on each side are integrated and common. Therefore, there are four non-common switches on both sides of the transformer, and 2(m-1) and 2(n-1) common switches on the primary and secondary sides, respectively.

Fig. 1
figure 1

General topology of the RS-MAB converter as a basic unit for modular SST.

According to the intended application as the solid-state transformer integrated with the distribution grid, the converter’s bridges are series on the medium voltage side to share the high input voltage and are parallel on the low voltage side to share the high output current (ISOP architecture). Other possible architectures (i.e., ISOS, IPOS, and IPOP) are also available by changing the bridges in series or parallel.

To facilitate converter analysis, the Y-model equivalent circuit of the k-winding transformer, illustrated in Fig. 2, is employed. In this model, the LV side parameters are referred to the MV side. The equivalent circuit parameters are derived from the original parameters displayed in Fig. 1 and the transformer turn ratio, as expressed in (1).

$${v^{\prime}_{is}}=N{v_{is}},\;\;{i^{\prime}_{is}}=\frac{{{i_{is}}}}{N},\;\;\;{L^{\prime}_{is}}={N^2}{L_{is}},\;\;\;i=1,2,...,n$$
(1)

According to the application of the SST in a smart distribution grid, the following assumptions should be considered41:

  • All bridges on the MV side have equal voltage values, VM, and all bridges on the LV side have equal voltage values, VL.

  • The power balance conditions are satisfied in both the MV and LV side bridges.

  • The phase-shift angle between the MV and the LV bridges is the same.

  • The turn ratios between the MV windings and the LV windings are the same.

  • The leakage inductance of the MV side windings is equal to that of each other (L1p= L2p=…=Lmp=Lp). Likewise, the leakage inductance of the LV side windings is also the same (L1s= L2s=…=Lns=Ls).

The equivalent circuit of the RS-MAB, considering these assumptions, is shown in Fig. 3. In this case, the RS-MAB is similar to the standard DAB. Therefore, TCM modulation is extended and used to achieve zero-current switching (ZCS) in the RS-MAB converter as an alternative to resonance circuits. The TCM provides three degrees of freedom to control the converter: the MV side duty cycle (Dp), the LV side duty cycle (Ds), and the phase shift(φ). These control parameters are used to determine the amount and direction of the transferred power and to achieve zero current switching.

The switching pattern and key waveforms of the proposed converter with the TCM for transferring power from the MV to the LV side are shown in Fig. 4. The detailed description of each time interval for the positive half-cycle is as follows:

Interval I [0- DpTs]: Before time 0, the current of inductors is zero. At time 0, switches S2, S4, and S1, S3, , and Sm of the MV side are turned on at zero current switching, and the voltage VM/m on each MV side winding is applied. Additionally, the body diodes of the switches Q1, Q2, Q3, , and Qn on the LV side are turned on at zero current switching, and voltage VL is applied on each LV side winding, leading to NVL at the MV side of the transformer. As a result, the difference between two voltages (VM/m- NVL) across the equivalent inductor is positive, and its current increases linearly from zero to its maximum. The maximum value of the current at the end of Interval I can be found using (2). Figure 5 depicts the converter’s configuration with two series bridges on the MV side and two parallel bridges on the LV side during this time interval.

Fig. 2
figure 2

Y –model equivalent circuit of the RS-MAB.

Fig. 3
figure 3

Thevenin equivalent circuit of the RS-MAB.

$${i_{\hbox{max} }} - 0=\Delta {i_{{L_{eq}}(0 \leqslant t<{D_p}{T_s})}}=\frac{{({{{V_M}} \mathord{\left/ {\vphantom {{{V_M}} m}} \right. \kern-0pt} m} - N{V_L}){D_p}}}{{{L_{eq}}{f_s}}}$$
(2)

Interval II [DpTs– DsTs]: At time DpTs, switches S1, S3, , and Sm are turned off. The MV side bridges enter freewheeling mode through S2, S4, , and the body diode of S’2, S’4, , applying zero voltage to each MV side winding. The body diodes of switches Q1, Q2, Q3, , and Qn on the LV side remain on, and voltage VL is applied to each LV side winding. Therefore, the voltage across the inductors will become negative, and the current slope will change from positive to negative. The current changes in this time interval is expressed by (3). The condition defined in (4) must be fulfilled to ensure that the current reaches zero at the moment DsTs and that the ZCS transition is guaranteed. Therefore, the relationship between Dp and Ds is obtained by (5). The configuration of the converter during Interval II is shown in Fig. 6.

$$\Delta {i_{{L_{eq}}({D_p}{T_s} \leqslant t<{D_s}{T_s})}}=\frac{{N{V_L}({D_s} - {D_p})}}{{{L_{eq}}{f_s}}}$$
(3)
$$\Delta {i_{{L_{eq}}(0 \leqslant t<{D_p}{T_s})}}=\Delta {i_{{L_{eq}}({D_p}{T_s} \leqslant t<{D_s}{T_s})}}$$
(4)
$${D_p}=\frac{{N{V_L}}}{{{{{V_M}} \mathord{\left/ {\vphantom {{{V_M}} m}} \right. \kern-0pt} m}}}{D_s}$$
(5)

Interval III [DsTs–Ts/2]: At time DsTs, the current of inductors is zero, and switches S2, S4, , and the body diodes of S’2, S’4, , on the MV side, and the body diode of Q1, Q3, , Qn on the LV side are turned off at ZCS. For both the MV side and the LV side bridges, zero voltage is applied on each winding. The voltage across the inductors is zero, and their current remains zero until the end of the positive half-cycle. The negative half-cycle process is similar to the positive half-cycle process. The configuration of the converter during Interval III is shown in Fig. 7.

Fig. 4
figure 4

Switching pattern and main waveforms of the RS-MAB.

Fig. 5
figure 5

Configuration of converter during Interval I [0- DpTs].

Fig. 6
figure 6

Configuration of converter during Interval II [DpTs– DsTs].

Fig. 7
figure 7

Configuration of converter during Interval III [DsTs–Ts/2].

Transformer and semiconductors currents

Based on the current waveforms depicted in Fig. 4, the rms currents on the windings of the MV and LV sides of the transformer are calculated by (6) and (7), respectively.

$${i_{1p(rms)}}=...={i_{mp(rms)}}=\frac{{({{{V_M}} \mathord{\left/ {\vphantom {{{V_M}} m}} \right. \kern-0pt} m} - N{V_L})}}{{3m{L_{eq}}{f_s}}}\sqrt {6{D_p}^{2}{D_s}}$$
(6)
$${i_{1s(rms)}}=...={i_{ns(rms)}}=\frac{{N({{{V_M}} \mathord{\left/ {\vphantom {{{V_M}} m}} \right. \kern-0pt} m} - N{V_L})}}{{3n{L_{eq}}{f_s}}}\sqrt {6{D_p}^{2}{D_s}}$$
(7)

The voltage and current waveforms of the MV and LV side switches are shown in Fig. 8. As seen, at the MV side, the rms and average current on the switches are unequal and are calculated by (8) and (9) for odd-numbered switches and (10) and (11) for even-numbered switches, respectively.

$${i_{S1,\,3,\,...,\,m(rms)}}=\frac{{({{{V_M}} \mathord{\left/ {\vphantom {{{V_M}} m}} \right. \kern-0pt} m} - N{V_L})}}{{3m{L_{eq}}{f_s}}}\sqrt {3{D_p}^{3}}$$
(8)
$${i_{S1,\,3,\,...,\,m(avg)}}=\frac{{({{{V_M}} \mathord{\left/ {\vphantom {{{V_M}} m}} \right. \kern-0pt} m} - N{V_L}){D_p}^{2}}}{{2m{L_{eq}}{f_s}}}$$
(9)
$${i_{S2,\,4,\,...,(rms)}}=\frac{{({{{V_M}} \mathord{\left/ {\vphantom {{{V_M}} m}} \right. \kern-0pt} m} - N{V_L})}}{{3m{L_{eq}}{f_s}}}\sqrt {3{D_p}^{2}{D_s}}$$
(10)
$${i_{S2,\,4,\,...(avg)}}=\frac{{({{{V_M}} \mathord{\left/ {\vphantom {{{V_M}} m}} \right. \kern-0pt} m} - N{V_L}){D_p}{D_s}}}{{2m{L_{eq}}{f_s}}}$$
(11)

On the LV side, the rms and average current of common semiconductors are twice that of non-common semiconductors. The rms and average current of non-common semiconductors were calculated by (12) and (13), and for common semiconductors, calculated by (14) and (15), respectively.

$${i_{Q1,\,n(rms)}}=\frac{{N({{{V_M}} \mathord{\left/ {\vphantom {{{V_M}} m}} \right. \kern-0pt} m} - N{V_L})}}{{3n{L_{eq}}{f_s}}}\sqrt {3{D_p}^{2}{D_s}}$$
(12)
$${i_{Q1,\,n(avg)}}=\frac{{N({{{V_M}} \mathord{\left/ {\vphantom {{{V_M}} m}} \right. \kern-0pt} m} - N{V_L}){D_p}{D_s}}}{{2n{L_{eq}}{f_s}}}$$
(13)
$${i_{Q2,\,3,\,...,\,n - 1(rms)}}=\frac{{2N({{{V_M}} \mathord{\left/ {\vphantom {{{V_M}} m}} \right. \kern-0pt} m} - N{V_L})}}{{3n{L_{eq}}{f_s}}}\sqrt {3{D_p}^{2}{D_s}}$$
(14)
$${i_{Q2,\,3,\,...,\,n - 1(avg)}}=\frac{{N({{{V_M}} \mathord{\left/ {\vphantom {{{V_M}} m}} \right. \kern-0pt} m} - N{V_L}){D_p}{D_s}}}{{n{L_{eq}}{f_s}}}$$
(15)
Fig. 8
figure 8

Switches current and switches voltage waveforms of the RS-MAB: (a) MV side, (b) LV side.

To calculate the transferred power, the average value of the MV side current (IM) is calculated by (16), and the transferred power is subsequently calculated by (17).

$${I_M}=\frac{2}{{{T_s}}}\int_{0}^{{{D_p}{T_s}}} {{i_p}(t)dt=} \frac{{({{{V_M}} \mathord{\left/ {\vphantom {{{V_M}} m}} \right. \kern-0pt} m} - N{V_L}){D_p}^{2}}}{{m{L_{eq}}{f_s}}}$$
(16)
$${P_T}={V_M}{I_M}=\frac{{{V_M}({{{V_M}} \mathord{\left/ {\vphantom {{{V_M}} m}} \right. \kern-0pt} m} - N{V_L}){D_p}^{2}}}{{m{L_{eq}}{f_s}}}=\frac{{m{{(N{V_L})}^2}({{{V_M}} \mathord{\left/ {\vphantom {{{V_M}} m}} \right. \kern-0pt} m} - N{V_L}){D_s}^{2}}}{{{L_{eq}}{f_s}{V_M}}}$$
(17)

Configuration, design, and control of the RS-MAB

Different configurations of the RS-MAB can be considered as a building block of the DC-DC stage converter for the ISOP SST structure. In this work, to ensure a fair comparison with the DAB and symmetrical quadruple active bridge.

(SQAB), the RS-MAB unit is considered with two series bridges on the MV side and two parallel bridges on the LV side, and it is named reduced switch symmetrical quadruple active bridge (RS-SQAB).

Figure 9 displays one phase of a three-phase modular ISOP SST structure, comprising U number of DAB units (Fig. 9a) and U/2 number of SQAB and RS-SQAB units (Fig. 9b,c). All of these units transfer the same power and have identical input and output voltages and currents.

Design procedure

For the comprehensive analysis and design of the RS-SQAB unit depicted in Fig. 9c, the specifications of the sample grid stated in Table 1 have been used.

If semiconductors with a voltage rating of 1.2 kV, 1.7 kV, and 3.3 kV were selected for the design, and the utilization factor of the switches was considered about 0.65, five RS-SQAB units per phase are required. Therefore, the specifications of each RS-SQAB unit in the three-phase system are: \({V_M}={{{V_{MVDC}}} \mathord{\left/ {\vphantom {{{V_{MVDC}}} {{N_{unit}}}}} \right. \kern-0pt} {{N_{unit}}}}={{10.2} \mathord{\left/ {\vphantom {{10.2} 5}} \right. \kern-0pt} 5}=2040\,V,\,\,\,\,\,\,{V_L}={V_{LVDC}}=700\,V\) and \({P_{RS - SQAB}}={{{P_{SST}}} \mathord{\left/ {\vphantom {{{P_{SST}}} {{N_{unit}}}}} \right. \kern-0pt} {{N_{unit}}}}={{630\,kw} \mathord{\left/ {\vphantom {{630\,kw} {15}}} \right. \kern-0pt} {15}}=42kw\). Additionally, the selected switching frequency and transformer turn ratio are fs= 20 kHz and N = 1.2, respectively.

The maximum value of the LV side duty cycle is Ds = 0.5. To achieve zero-current switching (ZCS) operation, it is necessary to have a small zero time. Therefore, the nominal duty cycle of Ds = 0.48 is chosen for the LV side27.

Based on Eq. (5), the duty cycle of the MV side is obtained as shown in (18). Using the obtained values and Eq. (17), the equivalent inductance is calculated as shown in (19).

$${D_p}=\frac{{N{V_L}}}{{{{{V_M}} \mathord{\left/ {\vphantom {{{V_M}} m}} \right. \kern-0pt} m}}}{D_s}=\frac{{1.2 \times 700}}{{2040/2}} \times 0.48=0.395$$
(18)
$$\begin{aligned} {L_{eq}} & =\frac{{m{{(N{V_L})}^2}({{{V_M}} \mathord{\left/ {\vphantom {{{V_M}} m}} \right. \kern-0pt} m} - N{V_L}){D_s}^{2}}}{{{P_T}{f_s}{V_M}}} \\ & =\frac{{2{{(1.2 \times 700)}^2}(2040/2 - 1.2 \times 700){{0.48}^2}}}{{42000 \times 20000 \times 2040}}=34.15\,\mu H \\ \end{aligned}$$
(19)
Table 1 Specification of the grid and SST.
Fig. 9
figure 9

One phase of three phases modular ISOP SST structure with (a) U number of DAB units, (b)U/2 number of SQAB and (c) U/2 number RS-SQAB units.

The average and rms current of the semiconductors and the rms current on the MV side and LV side of the transformer are calculated using (6)–(15). The results are summarized in Table 2.

Table 2 Current efforts of the RS-SQAB unit.

Suitable semiconductor devices for the converter are selected based on the voltage and current stresses encountered during operation. Table 3 summarizes the selected devices along with their key specifications at a junction temperature of 100 °C.

Table 3 Current efforts of the RS-SQAB unit.

The MF transformer is another crucial element to consider during the design process of the RS-MAB converter. The efficiency and power density of the converter are closely linked to the performance of the MF transformer. The flux density optimization method outlined in reference42 has been implemented to enhance efficiency. Following this method and the design process described in reference32, the appropriate ferrite core and Litz wire were selected. Specifications for the transformers are provided in Table 4. Litz wires have been used to reduce skin and proximity effects43. Also, to ensure equal leakage inductance, a special concentric winding method was employed. As shown in Fig. 10, in this method, the wires of the LV side’s coils in each layer are arranged side by side over the core, while the wires of the MV side’s coils in each layer are placed alongside each other over the LV side’s coils. This design ensures that the length of the coils and their distance from one another and the core are equal, resulting in nearly equal leakage inductance for all coils. The leakage inductances have been calculated based on the core’s geometrical dimensions and the winding parameters44.

As seen, the leakage inductance of the transformers is lower than the required equivalent inductance, determined based on Eq. (19). Therefore, two additional inductors of 31.5 µH should be added to the LV side winding of the transformers.

Table 4 Specification of the transformer.
Fig. 10
figure 10

HFT implementation with E shape core.

The specifications of the inductors are shown in Table 5. The core is chosen based on the energy stored in the inductor, the maximum flux density of the core, and the temperature rise in the inductor. After selecting the core, the next step is to design the winding, which involves determining the number of turns and choosing the appropriate wire size. The number of turns (N) in the winding is calculated using the inductance per turn value (AL) provided by the core manufacturers. Additionally, the wire size is determined based on the current density, which considers the desired temperature rise of the windings and the core-window winding area product42.

Table 5 Specification of inductors.

Also, the value of the DC link capacitor is calculated on the basis that the output voltage ripple does not exceed 0.5%. Therefore, one 150 µF can be used as an LV side DC link capacitor. The specifications of the capacitors are shown in Table 6.

Table 6 Specification of DC link capacitors.

Control system

One of the tasks of the DC-DC converter in the three-stage SST is to control the LVDC link, provide a regulated DC voltage to the LV stage, and control the power flow. The control system shown in Fig. 11 regulates the output voltage and is responsible for the total amount of power transferred from the MV side to the LV side using the DP variable. In this system, the LVDC link voltage is compared with its reference value, and its error is adjusted by a PI controller. Furthermore, to achieve the ZCS condition, the duty cycle of the LV side bridges is calculated using Eq. (5).

Simulation results

To evaluate the converter’s performance and confirm the theoretical analysis presented in this paper, the converter was simulated using PSIM software, based on the parameters outlined in Table 1.

The simulation results for the RS-SQAB converter under steady-state conditions at rated power (42 kW) are presented in Figs. 12 and 13. These results aim to demonstrate the fundamental operation of the converter as analyzed using the TCM discussed in the previous section. Figure 13 demonstrates the voltage and current on the MV side (v1p, v2p, i1p, and i2p) and the LV side (v1s, v2s, i1s, and i2s) of the transformer.

Fig. 11
figure 11

Control system block diagram.

The current and voltage waveforms for the common and non-common switches on the MV side are shown in Fig. 13a,b, respectively. It is noted that the voltage across the common switches is twice that of the non-common switches. Additionally, Fig. 13c,d present the current and voltage waveforms for the common and non-common switches on the LV side. In this case, the current through the common switches is twice that of the non-common switches. Also, these figures illustrate that all switches on the LV side exhibit ZCS during both the turn-on and turn-off. On the MV side, common switches demonstrate ZCS during both the turn-on and turn-off, whereas non-common switches only show ZCS during turn-on.

To assess the dynamic performance of the converter, both with and without the control system, step changes were applied to the load and input voltage. The simulation begins with 70% of the rated load and the nominal input voltage. At t = 0.1s, the load decreases to 40% of the rated value, then increases to 100% at t = 0.2s. Additionally, at t = 0.3s, the input voltage rises by 15%. Figure 14 illustrates the variations in the output voltage of the LV side of the converter without the control system, demonstrating its inability to stabilize the voltage. Figure 15 presents the output voltage variations of the LV side with the control system. In this scenario, the control system utilizes a PI controller to rapidly adjust the duty cycle of the primary (DP) and secondary (DS) sides, ensuring that the LV-side output voltage remains at its nominal value while maintaining the ZCS condition. Figure 16 depicts the variations in the duty cycles of the primary (DP) and secondary (DS) sides.

Fig. 12
figure 12

The voltage and current on the MV side (v1p, v2p, i1p and i2p) and LV side (v1s, v2s, i1s and i2s) of the transformer.

Fig. 13
figure 13

Switches current and switches voltage waveforms of the RS-SQAB: (a) MV side common switches, (b) MV side non-common switches, (c) LV side non-common switches, and (d) LV side common switches.

Fig. 14
figure 14

Output voltage variations on the LVDC side of the converter due to load and input voltage changes, without a controller.

Fig. 15
figure 15

Output voltage variations on the LVDC side of the converter due to load and input voltage changes, with a controller.

Fig. 16
figure 16

Variations in the primary-side duty cycle (DP) and secondary-side duty cycle (DS) due to changes in load and input voltage.

Losses analysis and comparison

Switching devices are the most critical components that influence the efficiency and cost of modular converters. This section begins by comparing the three topologies in terms of the number of switching devices and total standing voltage (TSV). Subsequently, a loss analysis is conducted to assess and compare the efficiency of each structure.

Eight, sixteen, and twelve power switches are used in each unit of the DAB, SQAB, and RS-SQAB, respectively. Eight switches of the RS-SQAB are non-common, and four switches are common. The standing voltage (SV) of each switch on the LV side and MV side of the DAB and SQAB-based structures can be calculated as follows, respectively45:

$$S{V_{sw,\,LV}}={V_{LV}}$$
(20)
$$S{V_{sw,MV}}=\frac{{N{D_s}{V_{LV}}}}{{{D_p}}}$$
(21)

Thus, the TSV in the DAB and SQAB-based structures can be calculated as follows, respectively:

$$TS{V_{DAB}}=\sum\limits_{{k=1}}^{U} {\sum\limits_{{i=1}}^{{{N_{sw}}}} {S{V_{sw}}} } =U{V_{LV}}(4+4N\frac{{{D_s}}}{{{D_p}}})$$
(22)
$$TS{V_{SQAB}}=\sum\limits_{{k=1}}^{{{U \mathord{\left/ {\vphantom {U 2}} \right. \kern-0pt} 2}}} {\sum\limits_{{i=1}}^{{{N_{sw}}}} {S{V_{sw}}} } =\frac{U}{2}{V_{LV}}(8+8N\frac{{{D_s}}}{{{D_p}}})$$
(23)

In the RS-SQAB-based structure, the SV of each switch on the LV side and each non-common switch on the MV side is the same as that in the DAB and SQAB-based structures, but the SV of common switches on the MV side of the RS-SQAB-based structure is twice that of non-common switches. Thus, the TSV of the RS-SQAB-based structure can be calculated as follows:

$$TS{V_{RS - SQAB}}=\sum\limits_{{k=1}}^{{{U \mathord{\left/ {\vphantom {U 2}} \right. \kern-0pt} 2}}} {\sum\limits_{{i=1}}^{{{N_{sw}}}} {S{V_{sw}}} } =\frac{U}{2}{V_{LV}}(6+4N\frac{{{D_s}}}{{{D_p}}}+2 \times 2N\frac{{{D_s}}}{{{D_p}}})$$
(24)

The comparison results, summarized in Table 7, demonstrate that the proposed RS-SQAB topology requires fewer switching devices and exhibits a lower TSV, indicating its potential for better performance compared to the DAB and SQAB configurations.

Table 7 Comparison of the proposed RS-SQAB converter with DAB and SQAB.

Power switches

The loss of power switches includes switching and conduction losses. As described in the previous section, when the power transfers from the MV side to the LV side, all of the switches turn-on and turn-off under soft-switching conditions, except for non-common switches on the MV side, which turn-off under hard-switching conditions. Consequently, only the turn-off losses for the non-common switches on the MV side are considered, while switching losses for the other switches are neglected. Also, in forward power flow, most of the current flows through the channel of the semiconductors on the MV side, while on the LV side, it predominantly passes through the body diode. Therefore, the losses of power switches can be calculated using Eq. (25).

$$P_{{loss}}^{{switch}}=P_{{cond}}^{{MV\,side}}+P_{{cond}}^{{LV\,side}}+P_{{sw}}^{{MV\,side(non - common)}}$$
(25)

Where, \(P_{{cond}}^{{MV\,side}},P_{{cond}}^{{LV\,side}}\,and\,P_{{sw}}^{{MV\,side(non - common)}}\) represent the conduction losses of the MV side switches, conduction losses of the LV side switches, and turn-off losses for the non-common switches on the MV side, respectively, and are defined as (26):

$$\left\{ \begin{gathered} P_{{cond}}^{{MV\,side}}={R_{DS(on)}}{I_{DS(rms)}}^{2} \hfill \\ P_{{cond}}^{{LV\,side}}={V_{d(on)}}{I_{d(avg)}}+{R_{d(on)}}{I_{d(rms)}}^{2} \hfill \\ P_{{sw}}^{{MV\,side(non - common)}}=\frac{1}{2}{f_s}{V_{DS}}{I_{DS(avg)}}{t_f} \hfill \\ \end{gathered} \right.$$
(26)

In (26), \({R_{DS(on)}}\)is the on-state resistance, \({I_{DS}}\)is the forward current, and tf is the falling time of the switches. Additionally, \({R_{d(on)}}\)is the on-state resistance, \({I_d}\)is the forward current and \({V_{d(on)}}\)is the forward voltage of the body reverse diodes.

Magnetic components

Losses in magnetic components, i.e., inductors and transformers, can be categorized into core and winding losses or copper losses. For non-sinusoidal voltage waveforms, the natural extension of the Steinmetz equation (NSE) can be utilized to calculate core losses per unit volume (in W/m³). The simplified version of the NSE for a square voltage waveform with a duty ratio D is presented in (27)46.

$${P_{Core(NSE)}}={K_N}{(2f)^\alpha }{B_{\hbox{max} }}^{\beta }({D^{1 - \alpha }}+{(1 - D)^{1 - \alpha }})$$
(27)

Additionally, the copper losses for each transformer and inductor are calculated using Eq. (28), where RAC denotes the AC resistance of the wires, which is affected by skin and proximity effects at high frequencies. The AC resistance of Litz wires is determined as outlined in reference [47].

$$\begin{gathered} {P_{Cu(\,Transforemr)}}=2{R_{AC(1p,\,2p)}}{({I_{1p,\,\,2\,p(\,rms)}})^2}+2{R_{AC(1s,\,2s)}}{({I_{1s,\,2s(\,rms)}})^2} \hfill \\ {P_{Cu(\,Inductor)}}={R_{AC(inductor)}}{({I_{1s,\,2s(\,rms)}})^2} \hfill \\ \end{gathered}$$
(28)

Capacitors

The losses of the output DC link capacitors are calculated using Eq. (29), where \({R_{ESR}}\) represents the equivalent series resistance of the capacitor.

$${P_{{C_o}}}\,={R_{ESR}}{I_{{C_o}(rms)}}^{2}$$
(29)

The losses associated with various components of the proposed converter were calculated using Eqs. (25)–(29), incorporating the parameter values listed in Tables 2, 3, 4, 5 and 6. Figure 17 depicts the loss distribution across the converter’s components during forward power flow. Clearly, the conduction losses in the body diodes on the low-voltage (LV) side represent the dominant portion of the total losses.

Fig. 17
figure 17

Distribution of losses across various components of the RS-SQAB.

Fig. 18
figure 18

Efficiency comparison of various DC-DC converters as the basic unit of modular SST topology.

Next, the efficiency of the proposed converter was calculated and compared with that of the DAB and SQAB converters. The TCM and design procedure described in the previous sections were also applied to the compared converters. The efficiency of converters is illustrated in Fig. 18. The RS-SQAB converter is more efficient than other converters because it has fewer components, particularly switches and high-frequency transformers (HFTs).

Experimental results

To verify the feasibility of the proposed converter topology with the TCM, a 500 W lab-scale prototype was built, and experimental results were obtained. Figure 19 illustrates the experimental prototype of the proposed converter, and its specifications are provided in Table 8. The MOSFET IRFP450s are used on the MV side and LV side bridges.

Table 8 Specification of the prototype converter.
Fig. 19
figure 19

Experimental prototype.

The maximum duty cycle for the LV side was set at Ds = 0.45. Therefore, the duty cycle for the MV side and the required equivalent inductance were calculated as Dp = 0.3 and Leq = 28.7 µH, respectively. The measured leakage inductance of the transformer from each HV side winding was 7 µH. To address this, two additional inductors of 35 µH were added to the LV side winding of the transformer. As a result, the equivalent inductance measured from the HV side increased to 28.7 µH. The voltage and current on the MV side and LV side of the transformer are depicted in Fig. 20a,b, respectively. As illustrated in the figure, the experimental voltage and current waveforms closely match the theoretical predictions. On the LV side, all switches operate under ZCS conditions during both turn-on and turn-off transitions. On the MV side, common switches also achieve ZCS during both switching events, while non-common switches exhibit ZCS only during turn-on.

Fig. 20
figure 20

Voltage and current waveforms of RS-SQAB converter. (a) MV side and (b) LV side.

Fig. 21
figure 21

Switches current and switches voltage waveforms of the RS-SQAB: (a) LV side non-common switches, and (b) LV side common switches.

Fig. 22
figure 22

The measured efficiency versus output power.

Figure 21a,b illustrate the current and voltage waveforms of the common and non-common switches on the LV side. As is evident, the current through the common switches is twice that of the non-common switches, corroborating the theoretical analysis. Moreover, these figures confirm that all switches on the LV side operate under zero-current switching (ZCS) during both turn-on and turn-off transitions. Also, Fig. 22 shows the measured efficiency of the converter across output power levels from 100 W to 500 W. The maximum efficiency of 92.61% occurs at 250 W, while the efficiency at the rated output power is 91.93%.

Conclusion

This article discusses the RS-MAB converter, which can be utilized in the DC-DC stage of solid-state transformers. The RS-MAB converter shares the same features as the MAB converter, such as soft-switching and a reduced number of high-frequency transformers. Additionally, the RS-MAB converter has the unique advantage of reducing the number of switches. This is achieved by integrating and sharing the switches of the bridges between the two windings on each side. Reducing the number of switches can enhance efficiency and increase the power density.

The triangular current modulation (TCM) strategy, previously employed in dual-active bridge (DAB) and quad-active bridge (QAB) converters, was adopted to modulate the proposed converter. This approach enables zero-current switching (ZCS) over a broad range of load and voltage conditions, thereby substantially reducing switching losses. The operating principles and fundamental equations governing the converter under TCM have been systematically derived and presented.

To evaluate the proposed converter and compare it with other suitable DC-DC converters, such as the DAB and SQAB, the RS-MAB, which has two series bridges on the MV side and two parallel bridges on the LV side (i.e., RS-SQAB), was selected, designed, and simulated. The proposed RS-SQAB has fewer devices and TSV than the DAB and SQAB under the same conditions. Additionally, the simulation results verified the theoretical analysis. Furthermore, an efficiency analysis was conducted by calculating element losses. The proposed RS-SQAB demonstrates better efficiency and power density than the DAB and SQAB, because of its lower device count and reduced TSV.

Ultimately, the experimental findings demonstrate the feasibility of the proposed converter topology along with TCM, which ensures ZCS for the converter’s switches.