Introduction

In accordance with Moore’s Law, metal oxide semiconductor field effect transistors (MOSFETs) have continuously shrunk, leading to the development of gate-all-around (GAA) architecture, which have superior gate controllability than FinFETs1,2,3,4,5,6,7,8,9,10. Hence, quantum mechanical effects such as tunneling and confinement are becoming increasingly crucial, and there has been extensive research on quantum conduction in the GAAFETs11,12,13,14. However, most previous studies have focused only on simplified, uniform-shaped device structures, as illustrated in Fig.1a. The possibility of significant quantum mechanical effects arising from the non-uniform complex geometry has generally been overlooked. In the GAAFETs, the inherent constriction geometry with the bulk source/drain (S/D) and stacked nanosheet (NS) channels necessitates an in-depth investigation into quantum transport through the narrowing junction. Ironically, although realistic fabrication of GAAFETs has already become feasible, numerical experiment still remains a challenging field due to the excessive turnaround time (TAT) of large-scale quantum transport simulation. NS GAAFETs generally have a much smaller on-current than 1 mA/um3,7,9,10, but the physics behind this subpar performance have not yet been revealed. Here, we utilized large-scale quantum transport simulation for realistic device design and found hidden quantum geometrical effects that obstruct ideal GAAFET operation.

Fig. 1: Quantum-access-resistance-induced carrier reflection in various device structure.
Fig. 1: Quantum-access-resistance-induced carrier reflection in various device structure.The alternative text for this image may have been generated using AI.
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a–c Various shape of the devices (low doping cases). All conditions are the same except for the channel access geometry. The bulk source/drain have a cross-section of 12 nm × 12 nm, and the NS regions have a cross-section of 4 nm × 8 nm. d Transition from 3D electrons in bulk source/drain to 2D electrons in nanosheet channels can cause strong carrier reflection due to abrupt change of the mode energy at the constriction. Abrupt mode energy (density of state) change causes injection barrier and carrier reflection. Drain-current vs gate-voltage characteristic (VDS = 0.6 V) for (e) (100)-surface orientation device and (f) (110)-surface orientation device.

It has been reported that quantum conduction can be greatly influenced by the constriction both in the experimental15,16 and theoretical17,18 studies. As illustrated in Fig. 1d, transverse energies occupied by electrons change abruptly at the constriction, resulting in injection barrier and carrier reflection17. This phenomenon can also occur in GAAFET, as it has inherent constriction geometry. For instance, IBM group firstly showed that a dumbbell-shaped device (Fig. 1c) exhibits much lower on-current compared to a uniform-shaped device (Fig. 1a) based on the quantum transmitting boundary (QTBM) method in ballistic limit19,20,21,22. After that, Purdue group also investigated same phenomena based on the non-equilibrium Green’s function (NEGF) formalism23,24. They found that, contrary to the ballistic cases, once scattering effects are included, the inter/intra-valley interactions enhance the carrier injection through the constriction, and the on-current degradation becomes much less significant.

Although GAAFETs have a geometry that is vulnerable to quantum access resistance (QAR), previous papers already concluded that the on-current degradation due to carrier reflection at the constriction will be not significant in presence of the scattering mechanisms19,20,21,22,23,24,25,26,27. Since carrier reflection is suppressed with larger scattering and thicker NS, it has been considered negligible in the practical device design (Supplementary Fig. 1a). However, previous studies only focused on ideal devices with uniform high doping density at the bulk S/D regions, whereas realistic doping profiles are non-uniform and can be less than 1019 cm−3 at the constriction. In practical designs, the entrance of each stacked NS channel is exposed to different doping values ranging from high to low doping. These low constriction doping cases are inevitable to simultaneously optimize various device characteristics such as leakage, variability, and DC/AC performance4,28,29. For instance, to suppress short channel effects, GAAFETs are generally designed so that the doping concentration decays far away from the channels, so-called S/D underlap design30,31,32,33. In addition, even in cases where the low doping is not intended, low active doping cases frequently occur around the constriction, because dopants tend to segregate and inactivate at the silicon/oxide interface34,35,36.

In this Article, we reported strong carrier reflection at the constriction in realistic scenarios, which can reduce the on-current by more than two-fold and exacerbate the device variability. In low constriction doping cases, low energy electrons are highly filtered by the constriction-induced injection barrier. It causes unusual phenomena where the carrier injection is enhanced with higher scattering rate and lower density of state (DOS). QAR becomes more severe as the NS thickness decreases. Utilizing the supercomputing resources to ultra-large-scale simulation, we found that QAR greatly affects realistic stacked NS GAAFET optimization. Unique carrier injection characteristics, intertwined with complex current path and Schottky contact-induced depletion regions, result in peculiar device operations and optimization strategies, which contradict to the classical predictions. It demonstrates that quantum geometrical effects are the critical bottlenecks that can cause unexpected performance degradation of GAAFET, and full-quantum analysis is essential for appropriate device design.

Results and discussion

Quantum effects in low S/D doping devices

To study quantum conduction characteristics through a constriction, we used our in-house quantum transport simulator, Polaris Quantum (Methods). We considered the uniform-shaped, dog-bone-shaped, and dumbbell-shaped devices as illustrated in Fig. 1a–c. The doping profile follows a Gaussian distribution (Supplementary Fig. 1b) and has low constriction doping density of about 3*1018/cm3. It mimics both intended low doping case for suppressing short channel effects, and unintended low doping case due to dopant segregation and inactivation at the oxide interface. We considered two cases: (100)-devices, which have (100) surface orientation and <110> transport direction, and (110)-devices, which have (110) surface orientation and <110> transport direction.

The drain-current versus gate-voltage characteristics reveal that the dumbbell-shaped device exhibits a noticeably smaller on-current compared to the uniform device, as depicted in Fig. 1e, f. It demonstrates that if the NS device has a low doping density in the constriction regions, QAR considerably degrade the carrier injection. The dog-bone-shaped devices can mitigate the abrupt change of cross-section, and exhibit a higher on-current compared to the dumbbell-shaped device as shown in Fig. 1e, f. From a classical picture, it seems that the larger the S/D area, the lower the total resistance. However, in nanoscale devices, the opposite occurs due to carrier reflection at the constriction. Although QAR has been considered negligible until now, our results demonstrate that QAR can be very important in practical doping profiles as shown in Supplementary Fig. 1b. As the constriction doping density decreases, the Fermi level decreases relative to the first subband energy, thus the threshold energy required to transmit to the sparse mode greatly increases, which causes strong carrier reflection.

Effects of effective mass

As shown in Fig. 1e, f, on-current degradation is more severe in the (100)-devices, indicating that the QAR is a significant problem in the NS GAAFETs, which generally have (100) surface orientation. Since the confinement mass is smaller in the (110) surface orientation, it has a sparser mode energy. Therefore, if carrier reflection is due to a sharp change of mode energy at the constriction, it seems that carrier reflection is greater in the (110) surface orientation. However, our simulation results show that the on-current degradation is larger in the (100)-device. In scenarios with the same electron density, a smaller effective mass brings the Fermi level closer to the first subband energy to compensate for the lower DOS. This lowers the injection barrier through the constriction and can suppress carrier reflection. These phenomena can lead to a unique device optimization strategy that improves device performance by lowering the DOS at the constriction. This interpretation is verified with the numerical results as shown in Supplementary Fig. 2a, b, which clearly shows the higher energy dominant electron spectrum in (110) device compared with (100) device.

Effects of scattering rate

Figure 2a shows the simulation results for various scattering rates. A weird situation occurs where the on-current is smaller in the ballistic case than in the scattering cases in dumbbell-shaped devices. It can be interpreted that carrier reflection is maximized due to the absence of scattering that enhances carrier injection through intra-mode interaction25,37. The absence of scattering effects improves mobility, but it also greatly increases carrier reflection at the constriction. Hence, as shown in Fig. 2a, when QAR is dominant, a higher scattering rate results in a higher on-current. However, if the scattering rate becomes excessively high, the effect of mobility reduction becomes predominant and the on-current decreases again. In contrast, in the uniform-shaped devices, as generally expected, the on-current decreases monotonically and more rapidly with increasing scattering rate as shown in Fig. 2a. It demonstrates that scattering is not necessarily a bad thing in the GAAFETs, but rather can be utilized to enhance the carrier injection properties.

Fig. 2: Device characteristics depending on NS thickness, scattering rate, and doping profile.
Fig. 2: Device characteristics depending on NS thickness, scattering rate, and doping profile.The alternative text for this image may have been generated using AI.
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a Effect of E-P scattering on the drain current. Dumbbell-shaped devices show the unusual result that the closer to ballistic, the more severe the carrier reflection, resulting in a decrease in on-current; uniform-shaped devices show a monotonic decrease in on-current with increasing scattering rate, as expected. b On-current of the dumbbell-shaped and uniform-shaped devices according to constriction doping density. We changed the doping density by adjusting the doping junction depth as shown in Supplementary Fig. 1b. The (c) uniform-shaped (d) dumbbell-shaped devices with high constriction doping density have almost the same on-current. However, as the constriction doping decreases, the carrier reflection become severe and the on-current of the dumbbell-shaped device decreases rapidly.

Simulation for various doping cases

We also conducted simulations for various S/D doping cases. To examine the effects of the doping density at the constriction, we carried out simulations for various doping depth, assuming a constant Gaussian decay rate as shown in Supplementary Fig. 1b. As shown in Fig. 2b, uniform-shaped devices (Fig. 2c) are not significantly impacted by the S/D doping profile. However, in the dumbbell-shaped device (Fig. 2d), the QAR is highly sensitive to the constriction doping density, leading to considerable on-current degradation as the doping density decreases. Since carrier reflection is maximized in the ballistic case, the on-current is lower than in the scattering case for the low doping density. However, in high constriction doping cases, because the QAR is negligible, both the dumbbell-shaped device and the uniform-shaped device show the almost same on-current and normal device operation in which the on-current is higher in the ballistic cases. In addition, the ballistic cases exhibit a more step-functional on-current characteristic depending on the doping density, as there is no energy relaxation of the source-injected current.

Figure 3a, b display a 1-D cut of the conduction band at the center of devices. In the case of low constriction doping, as shown in Fig. 3a, the dumbbell-shaped device exhibits a higher relative barrier height and wider effective channel length than the uniform-shaped device, indicating a higher reflection of carriers at the entrance of the NS channel. Strong carrier reflection greatly influences the carrier density (Fig. 3c) in the NS channel and results in a significantly different conduction band profile (Fig. 3a). However, in the case of high constriction doping, the conduction bands are nearly identical around the channel regions (Fig. 3b), leading to nearly identical electron density (Fig. 3d). The difference in the conduction band energy at the S/D regions in Fig. 3a, b arises because the bulk S/D of the dumbbell-shaped device has a higher DOS than the NS S/D of the uniform-shaped device. When having the same fermi energy, the bulk S/D regions with a higher DOS can occupy the same electron density with a higher conduction band energy than the NS S/D regions with a lower DOS. Since bulk regions and NS regions have different DOS, when these two regions form a junction, a band bending occurs to align the fermi level at the constriction, as clearly observable in Fig. 3a. In the uniform-shaped device, the low doping density of the NS extension regions forms the wide barrier, which can effectively suppress short channel effects with minimal on-current loss38. However, when the constriction is exposed to the low doping density, as in the dumbbell-shaped device, the large on-current reduction occurs due to strong carrier reflection. Therefore, it is crucial to carefully examine the possibility of QAR occurrence when implementing an S/D underlap design to avoid the short channel effects.

Fig. 3: Doping-dependent conduction band/electron density and impact of random dopant fluctuation on quantum access resistance.
Fig. 3: Doping-dependent conduction band/electron density and impact of random dopant fluctuation on quantum access resistance.The alternative text for this image may have been generated using AI.
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Conduction band energy at the center of device for (a) low constriction doping and (b) high constriction doping devices. Electron density at the center of device for (c) low constriction doping and (d) high constriction doping devices. e On-current distribution (VDS = VGS = 0.6 V) for 30 random samples considering surface roughness and random dopant fluctuation of low-doped (100)-devices in Fig. 1a, c (dot : each sample, line : average value). Carrier injection in a dumbbell-shaped device is very sensitive to the doping position around the constriction and thus exhibits a large standard deviation of on-current. Discrete dopant and surface roughness configuration for (f) the best case and (g) the worst case dumbbell-shape device. The fewer discrete dopants near the constriction, the larger the carrier reflection. h Current spectrum at the source for the base and worst case.

Impurity and surface roughness effects

For a more realistic and statistical analysis, we conducted simulations that explicitly include random dopant fluctuation (RDF) and surface roughness (SR). As most dopants are in the S/D regions far from the channel, the drain current exhibits a small standard deviation of 5.6% in the uniform-shaped devices, as shown in Fig. 3e. However, in dumbbell-shaped devices, QAR is substantial, and carrier injection can be significantly affected by the atomistic dopant location. Hence, the standard deviation of the drain current is considerably larger at 19.9%. When averaging each sample (solid lines in Fig. 3e), the average-on-current degradation is 60.5%, which is not significantly different from the continuum cases in Fig. 1e. In the dumbbell-shaped device, if many dopants happen to be located around the constriction, it exhibits a very high on-current (best case, Fig. 3f), and if there are almost no dopants around the constriction, it exhibits a very low on-current (worst case, Fig. 3g). Figure 3h displays the current spectrum at the source contact for both cases, clearly indicating high injection in the best case. This results in a broad distribution of DC performance, and we found that even if the channel is close to intrinsic, the discrete dopants in the bulk S/D can significantly impact the reliability of GAAFETs. It was hoped that the underlap S/D design would reduce the short-channel effect and reduce the variability caused by discrete dopants near the channel. However, our results show that underlap design also causes both on-current and variability degradation.

Stacked NS GAAFET simulation

So far, quantum transport simulations have been predominantly used for only simplified device structures. The computation of full device structures, including bulk S/D in stacked NS GAAFET, has been considered not only numerically challenging but also not highly necessary. However, in the previous sections, we discovered that the design of the bulk S/D regions can have a significant impact on device performance. Therefore, to verify the full-quantum effects on device design in a realistic device structure, we simulated an ultra-large-scale device (36 × 62 nm2) with six-stacked NS channels based on real-space 2D NEGF simulation (Methods), as shown in Fig. 4a. It can also contain a Schottky contact with arbitrary shape as shown in Fig. 4c.

Fig. 4: Quantum geometrical effects in stacked nanosheet GAAFETs.
Fig. 4: Quantum geometrical effects in stacked nanosheet GAAFETs.The alternative text for this image may have been generated using AI.
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a Six-stacked NS GAAFETs (Lext = 4 nm, Lcontact = 30 nm) and (b) current flow inside the device (Lext = 2 nm, Lcontact = 30 nm). Complex current paths and arbitrary contact shapes with Schottky barrier were considered. c Conduction band showing the Schottky barrier. d Drain-current vs gate-voltage characteristics for non-optimized device with dumbbell-shaped nanosheet extension (Lext = 2 nm, Lcontact = 30 nm), optimized device with dog-bone-shaped nanosheet extension (Lext = 4 nm, Lcontact = 30 nm), and ideal uniform-shaped device (multiplied by six). Simulations for realistic devices show much smaller on-current levels than uniform-shaped device simulations due to the various parasitic effects in the bulk source/drain. Effect of (e) contact depth/(f) Lext on the on-current. g As Lext gets longer, the on-current increases due to increased carrier injection, but then the on-current decreases again as extension resistance becomes dominant.

The large-scale simulation results are compared with the result of simulating each channel individually, as shown in Fig. 4d. Here, the simulation result for a uniformly shaped single-channel device were multiplied by a factor of six and compared to the simulation result for full-structure. The simulation, assuming a uniform-shaped device - which is commonly used to focus on the channel area to reduce the TAT - greatly overestimates the device performance as shown in Fig. 4d. This demonstrates that the parasitic effects in bulk S/D further degrade device performance, which primarily determines the overall device operation. By introducing parasitic resistance or tuning the scattering rates in the simplified uniform-shaped device simulation, we may be able to achieve a current level similar to hardware data. However, this is merely a fitting and cannot be utilized for practical device optimization considering the complex geometrical effects. One of the biggest problems we have been faced when attempting to apply quantum transport simulation to practical device optimization was the large overestimation of on-current compared to the experimental data. The NEGF simulation results generally predict an on-current of more than 1 mA/um for a single NS channel. However, hardware data typically show only a few hundred uA/um of on-current, and there has been difficulty in explaining this significant gap. This issue can be considerably resolved in a physical way by considering quantum geometrical effects.

Figure 4b shows that the current path sharply bends in an L-shape, as electrons are injected in a direction perpendicular to the NS channels, and it causes a sharp momentum change and additional parasitic resistance39. Supplementary Fig. 3 shows the impact of the current path on device characteristics. We conducted a simple test for two cases - the contact position is on the side or top. The on-current is lower in the top contact device compared to the side contact device, which clearly indicates that the L-shaped current path results in additional parasitic resistance. Another unusual phenomenon is that the bottom three channels exhibit a higher current density than the top three channels, as shown in Fig. 4b. Among them, especially the fifth-floor channel, sandwiched between Schottky contacts and other channels, has the lowest current density. Based on the classical Ohm’s law, it is expected that the further the channel is from the injection boundary condition, the greater the parasitic resistance. However, as the bulk S/D region has aggressively shrunk, electron depletion regions, induced by the Schottky barrier, greatly degrade the carrier injection into the NS channels when the channel is too close to the S/D Schottky contact. Supplementary Fig. 4a shows the spatial electron density in the on-state. It is observed that a strong depletion region is formed near the Schottky contact, resulting in low electron density and low injection at the entrance of the top three channels. This also impacts the optimization of the S/D contact depth. Figure 4e shows that the on-current increases until the contact depth reaches 30 nm, as the contact area increases and the contact resistance decreases. However, if the contact depth becomes too deep, the reduction in carrier injection due to the depletion region becomes more dominant than the increase in contact area, leading to a decrease in the on-current. This indicates that deeper S/D contact is not always an optimal device design method and requires careful contact design. Therefore, in addition to intrinsic QAR, Schottky-induced-QAR is also very important for device optimization.

We evaluated the effect of the NS extension length (Lext) in Fig. 4a. While longer Lext generally reduces parasitic capacitance, it is also known to degrade the on-current by reduced gate fringing field and increased extension resistance40,41. However, we discovered some interesting device behavior that contradicts conventional predictions. Figure 4f shows that the on-current effectively increases up to Lext = 4 nm and decreases again with further length. As illustrated in Fig. 4g, this phenomenon can be interpreted as follows:

  1. (1)

    In the case of very short Lext, low constriction doping causes strong carrier reflections.

  2. (2)

    Longer Lext suppresses the carrier reflection due to an increase in constriction doping, resulting in a significant increase in on-current.

  3. (3)

    However, when the constriction doping exceeds 1020 cm−3, the narrowing junction approaches reflectionless contact. Therefore, further increasing the Lext does not improve carrier injection, and the on-current decreases again due to increased extension resistance and decreased gate fringing field.

  4. (4)

    As the Lext becomes much longer, the entrance of the NS region encounters Schottky barrier-induced depletion regions as shown in Supplementary Fig. 4a, b. This degrades the carrier injection, causing the on-current to drop sharply.

As demonstrated above, quantum mechanical analysis can be utilized to determine the optimal Lext. If doping cannot be pushed deep into the channel to suppress short channel effects, constriction doping can be increased by forming longer NS extension regions to achieve reflectionless contact at the constriction. If we additionally introduce the dog-bone-shaped extension shape as illustrated in Fig. 4a, we can further enhance the performance of the device as shown in Fig. 4f, as it suppresses the carrier reflection at the 4–6F NS channels. Increasing the Lext is usually enough to enhance carrier injection thorough constriction. However, in stacked NS GAAFETs, increased Lext cannot enhance the carrier injection in NS channels adjacent to the Schottky barrier-induced depletion region. In these cases, the carrier injection should be enhanced by relaxing the constriction geometry. Figure 4d shows the full I-V curves both for the non-optimized device with dumbbell-shaped NS extension (Lext = 2 nm) and optimized device with the dog-bone-shaped NS extension (Lext = 4 nm). NS extension engineering yielded about 20% on-current improvement. In practical devices, the doping concentration gradually decreases from the S/D contact to the channel through various nanofabrication process steps. Therefore, the change in Lext signifies a change in the constriction doping concentration, not only in our cases but also in all typical scenarios, leading to alterations in QAR-induced carrier injection. Therefore, our device optimization schemes, such as making Lext sufficiently long to maximize constriction doping and ensuring a sufficient distance between the constriction and the S/D Schottky contact, are generally applicable in the nanoscale device design.

The difference between device optimization direction from a quantum mechanical perspective and a classical perspective can be more clearly emphasized through the example of the NS trim design, which has been known as a method to reduce NS extension resistance42. The NS trim is a structure that broadens the area of the NS extension into a step-like-shape by modifying the inner spacer structure, as depicted in Supplementary Fig. 5a, b. From a classical perspective, the introduction of such a design would seemingly reduce the NS extension resistance and enhance device performance. However, we found that such a design rather degrades carrier injection and on-current as shown in Supplementary Fig. 5c. The introduction of the NS trim has the effect of reducing extension resistance, but it also induces an additional constriction geometry between the narrow NS and the widened NS region, as shown in Supplementary Fig. 5b. As the doping density decreases gradually as it closes to the channel, such additional constriction can easily be exposed to low doping density. Therefore, an unexpected severe QAR can occur in this area. As such, careful device design is required so that avoids abrupt cross-section changes.

For more rigorous simulations, SR and RDF are also be included as shown in Fig. 5a based on 2.5D simulation (Methods). Figure 5b shows that there is an on-current difference between including SR and RDF compared to not including them. Although SR and RDF obviously cause additional scattering, since RDF and SR also have a significant impact on carrier injection, the on-current can vary greatly between random samples. Thus, we conducted 20 random samplings each for the non-optimized device and the optimized device. Figure 5c shows that by optimizing the device considering quantum geometrical effects, the average on-current increases by about 20%, and furthermore, device variability is also improved from ρ = 19.9% to ρ = 13.1%. In situations where QAR is severe, the carrier injection characteristic is greatly influenced by the presence or absence of dopants near the constriction. However, if QAR is minimized, most random samples have enough dopants located near the constriction, suppressing strong carrier reflection cases and improving device variability. These results demonstrate that considering full-quantum effects is essential in practical device design, not only in terms of device DC performance but also in terms of device reliability optimization.

Fig. 5: Impact of Random Discrete Dopants on the Performance of Stacked Nanosheet GAAFETs.
Fig. 5: Impact of Random Discrete Dopants on the Performance of Stacked Nanosheet GAAFETs.The alternative text for this image may have been generated using AI.
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a Configuration of RDF and SR in 2.5D simulation. By applying a periodic boundary condition to the thin 2.4 nm slab, the computational time can be significantly reduced compared to a realistic three-dimensional simulation. b I-V curve comparison between including SR and RDF (device with median on-current from the 20 random samples) and not including them. c 20 random samplings each for the non-optimized device (black dot) with dumbbell-shaped nanosheet extension (Lext = 2 nm, Lcontact = 30 nm) and the optimized device (red dot) with dog-bone-shaped nanosheet extension (Lext = 4 nm, Lcontact = 30 nm). Red and black lines indicate average values. The on-current for the median sample is not significantly different from the continuum case, but there is a very large device variability for each sample. Calculating the full I-V curve for all samples requires a prohibitively long turn-around-time, so we performed single bias point sampling for the on-state.

Figure 6a, b shows the drain current according to the number of stacked NS channels. The drain current increases with the channel number, but it does not increase proportionally to the number of channels due to various parasitic effects. As the number of NS channels increases, not only the on-current but also the off-current increases, so the on-current gain for the same off-current becomes much smaller. If we simply increase the number of stacked NS channels without any other device optimization, the on-current gain become smaller after 3-stacks. We benchmarked our simulation results against recent experimental results7,8,9,10 and the International Roadmap for Devices and Systems (IRDS)43. As shown in Fig. 6c, our simulation results show reliable on-current range compared with hardware data, without any nonphysical parameter tuning. If the simplified device structure is used, the TAT will decrease, but it greatly overestimates the current level and cannot be used for realistic device optimization. However, large-scale quantum simulation for realistic structures can forecast significant changes in on-current for the structure change, serving as a potent geometry optimization tool. Figure 6c shows that a non-optimized device with a dumbbell-shaped short NS extension (Lext = 2 nm) has an on-current much lower than the IRDS HP (the optimistic drive current for high-performance application in IRDS). However, an optimized device with a dog-bone-shaped long NS extension (Lext = 4 nm), which is designed to maximize the carrier injection, has an on-current close to the IRDS HP, even with a single NS channel. Our results clearly show that increasing NS extension length can effectively boost the device performance. We note that the TSMC device, which has the highest on-current among the references, is the only one that uses an additional inner spacer to lengthen the extension length, which has a dog-bone-like shape8, whereas the others have very short NS extension7,9,10. While the detailed doping density and the specs of the fabricated devices are not known, they are consistent with our results in that the devices with sufficiently long dog-bone-shaped NS extension are necessary for obtaining superior device performance. Thus, full-quantum simulation can filter device geometry that are expected to have lower performance than classical prediction. This will save the industrial nanofabrication cost and time that may be wasted manufacturing poorly designed devices.

Fig. 6: Device Performance as a Function of Nanosheet Stack Number and Comparison with Experimental Data.
Fig. 6: Device Performance as a Function of Nanosheet Stack Number and Comparison with Experimental Data.The alternative text for this image may have been generated using AI.
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a 1 ~ 4 stacked NS devices and (b) its drain-current vs gate-voltage characteristics. As the number of stacks increases, on-current increases. However, the value converges at 3–4 stacks. c Comparison of simulation results to experimental data and IRDS HP. Optimized device with long dog-bone-shaped NS extension (Lext = 4 nm) shows superior DC characteristics than non-optimized device with short dumbbell-shaped NS extension (Lext = 2 nm). Simulation results show reliable current values compared to the experimental results without any additional parameter tuning. The on-currents were read from the figures in the cited papers with an off-current of 10 nA/um. For Intel’s hardware data10 we assumed device footprint as 25 nm to estimate the normalized on-current. Also, the exact on-current value from TSMC8 was not reported, it was only stated that it exceeded 1 mA/um.

Our results showed that optimizing the device geometry on the 1-NS device provides ~40% on-current improvement (Fig. 6c), but only ~20% improvement on the 6-NS channel (Fig. 4d). It means that, in the complex stacked NS GAAFETs, improving device performance is much more challenging. This difficulty arises due to trilemmas caused by quantum geometric effects that cannot be predicted in classical limit. Contact depth, extension length, and device scaling have trade-off relationships, making device optimization very difficult. To minimize the QAR, the NS extension length must be increased as in Fig. 4f. However, when the constriction becomes too close to the S/D contact, Schottky-induced QAR occurs significantly, which greatly degrades the device performance. To prevent this, contact depth must be reduced, but then contact resistance becomes too large. To resolve all these issues, the contact must be positioned far away by increasing the size of overall S/D regions. However, it deviates from the device scaling rule. This demonstrates that not only has gate length scaling reached its physical limit due to short channel effects, but also S/D scaling is limited due to QAR-induced complex quantum geometrical effects. Realistic device optimization is mainly achieved by changing the device shape to find the optimum device operating point. Therefore, we believe that large-scale full quantum simulation is the best way to apply our quantum mechanical insights to the realistic device optimization.

Conclusion

We have reported the effect of constriction geometry on GAAFET performance. Practically, low constriction doping cases are inevitable to suppress the short channel effects and due to dopant segregation/inactivation at the oxide interface. In these cases, strong carrier reflection occurs at the constriction, which substantially degrades the device on-current and variability. This leads to the interesting conclusion that the bulk S/D, which is expected to have low resistance according to the classical Ohm’s law, is actually the key bottleneck that can cause extremely high access resistance. We identified these phenomena greatly affect the performance of realistic large-scale GAAFETs and proposed several unique device operations and optimization methods. For instance, we showed that to maximize carrier injection, a moderate contact depth and a sufficiently long extension length are required; it is contrary to the intuitive prediction that the on-current would be higher with a larger contact area and a shorter extension length. Like this, due to increasing importance of geometrical effects, stacked NS GAAFETs can no longer be simply interpreted through mobility, electrostatic effects, and contact resistance. Quantum-transport-driven device design will become increasingly important, and advances in CPU/GPU parallel computing technologies and machine learning methods44,45,46,47,48 will make it much more feasible. The GAA architectures based on the various materials, from silicon to 2D materials49,50,51,52,53,54, inherently have constriction geometry. Consequently, it is crucial to detect the materials and geometries that have superiority in terms of carrier injection engineering for practical device design beyond the 3 nm technology node.

Methods

Quantum transport simulation

We used in-house quantum transport simulator (Polaris Quantum) based on NEGF formalism55,56. It is highly parallelized with MPI, OpenMP, and GPU, and we utilized 19,200 CPU cores of Intel® Xeon® Gold 6342 processor for the large-scale calculation. The calculations for many energy grids are distributed to each node through infiniBand, achieving almost linear computational scalability up to hundreds of computing nodes (~500 in our cases). In the NEGF implementation, the retarded Green’s function is calculated to obtain the electron and current density:

$${{{\rm{G}}}}({{{\rm{E}}}})={[{{{\rm{EI}}}}-{{{\rm{H}}}}-\Sigma ]}^{-1}$$

For the Hamiltonian H, effective-mass approximation (EMA) with nonparabolicity correction was used to model the conduction band (ml = 0.98 and mt = 0.19). We assumed n-type silicon devices without strain/stress to focus on geometrical effects. The nonparabolic parameters for each valley are calibrated against the tight-binding simulation results to accurately accounting conduction band structure57,58. We considered intra-/inter-valley electron-phonon (E-P) scattering based on the deformation potential theory to fit the bulk mobility and experimental results11,59,60,61. Self-energy of phonon scattering was iteratively calculated with self-consistent born approximation (SCBA)11,62. In this work, we evaluated ideal DC performance without considering self-heating effects. For more realistic simulation and statistical analysis, RDF and SR can also be explicitly included. We randomly generated atomistic point charges by Poisson statistics and surface roughness by given amplitude and correlation length.

For efficient simulation, we used the coupled mode space (CMS) method63 with recursive Green’s function (RGF) technique62,64,65. Our implementation can consider arbitrary device structure, including the non-uniformity along the transport direction, which makes it suitable for our case study55,56. However, in a realistic device structure with stacked NS channels, it is difficult to use CMS due to the numerical inaccuracy and poor convergence in case of complex current path. Therefore, we used the real-space NEGF method for these cases. Since the real-space NEGF method requires much longer computation time because it directly solves the full Hamiltonian without mode composition, we assumed symmetry in the device depth direction (2D/2.5D simulation), which greatly reduced the simulation time. For the cases without RDF/SR, we used 2D simulation, and for the cases with RDF/SR, we used 2.5D (between 2D and 3D) simulation because the symmetry assumption in 2D simulation replicates RDF/SR infinitely in the device depth direction, creating an artificial cylindrical shape of RDF/SR. In the 2.5D simulation, we created a thin slab of 2.4 nm and generated the RDF/SR, then applied the periodic boundary condition in the depth direction. Unlike 2D simulations, it makes available to describe point charges and a reliable SR configuration. Also, even though CMS method can be inaccuracy in complex device structure such as stacked NS GAAFETs, it can effectively reduce the iteration number of real-space NEGF, as it can be used as good preconditioning tool to obtain the excellent initial guess. We used the CMS method to calculate an approximate solution more quickly in the initial iteration process, and then applied real-space NEGF to find the final solution.

We introduced virtual metals to effectively incorporate Schottky contacts and arbitrary contact shapes. These virtual metals have a constant electrostatic potential (Dirichlet boundary conditions) and the work function and band edge parameters are adjusted to achieve the desired SBH. By applying the conventional semi-infinite extension boundary conditions66,67 to the virtual metals and crafting the interfaces between the virtual metals and Silicon into any desired shape, we can phenomenically include the Schottky contacts with complex geometries. We assumed a pristine Si/C49-TiSi2 system as a silicide contact and based on experimental data68 and first-principle calculation69,70, we set the SBH value to 0.5 eV. Through fitting with the first principles calculation for more various contact cases, the model parameters will be further refined in future work.

In complex device structures that include a Schottky contact as shown in Fig. 4a, unexpected convergence issues may arise. For instance, a quantum well-like region can form between the S/D Schottky barrier and the channel injection barrier, slowing down SCBA convergence speed. To address this issue, we used the adaptive mesh refinement (AMR) method. Our in-house simulator automatically detects cases with poor convergence, identifies problematic energy levels with peak density, and applies AMR to significantly improve the convergence rate. All calculations were conducted at the room temperature (300 K) with lattice constant of 4 A and energy grid of 4 meV. Convergence criteria used in this work were 5*10−4 for relative potential change and 10−3 for relative terminal current change.