Electrical Conductivity in Thin Film Interconnects

Summary

Thin film interconnects form the critical wiring that links active devices in modern microelectronics. As feature sizes shrink below 20 nm, classical bulk assumptions about electrical conductivity break down, and scattering at surfaces, interfaces and grain boundaries becomes dominant. Electrons travelling through a thin metal line experience collisions not only with phonons and impurities but also with the line’s boundaries and crystalline defects, leading to an elevated resistivity compared with bulk. The degree of resistivity increase depends on film thickness, grain size, crystallographic orientation and the quality of diffusion‐barrier and adhesion layers. Advances in materials design, interface engineering and deposition techniques have sought to mitigate these size‐dependent losses, enabling reliable high‐speed interconnects in sub‐10 nm nodes. Recent work spans atomic‐scale studies of carrier transport in twin‐boundary-free films, precision etching for uniform nanowire fabrication and the exploration of novel barrier and conductor materials that maintain low resistance under extreme scaling.

Research from Nature Portfolio

Recent investigations have highlighted the role of crystallographic orientation in nanoscale conduction. Studies on single-crystal tungsten nanowires demonstrate that wires aligned along the <111> axis exhibit a markedly reduced resistivity size effect, with only a twofold increase at widths near 15 nm compared with a much higher rise in other orientations. This anisotropic behaviour is attributed to direction-dependent Fermi velocity and electron mean free path. Such findings underline the potential of orientation control to suppress resistivity penalties in ultra-narrow interconnects.

Electrical Conductivity in Thin Film Interconnects publication trend

The graph below shows the total number of articles in electrical conductivity in thin film interconnects across all publications each year (not limited to Nature Index journals).

Technical terms

Grain boundary: Interface between crystalline domains that scatters electrons and increases resistivity in polycrystalline films.

Mean free path: Average distance an electron travels between scattering events in a conductor.

Fermi surface: Surface in momentum space that separates occupied from unoccupied electron states at zero temperature, determining electrical properties.

Anisotropy: Direction-dependent variation of a material’s property, such as resistivity in different crystallographic orientations.

Damascene process: Fabrication method where trenches are etched in dielectric and subsequently filled with metal to form interconnects.

References

  1. Hole‐Carrier‐Dominant Transport in 2D Single‐Crystal Copper. Advanced Materials (2024).
  2. Controlled Stepwise Wet Etching of Polycrystalline Mo Nanowires. Advanced Functional Materials (2023).
  3. Materials Quest for Advanced Interconnect Metallization in Integrated Circuits. Advanced Science (2023).
  4. Crystallographic anisotropy of the resistivity size effect in single crystal tungsten nanowires. Scientific Reports (2013).

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