Ionic Liquid Gating in Two-Dimensional Semiconductor Devices

Ionic liquid gating exploits the formation of an electrical double layer at the interface between a two-dimensional semiconductor and a room-temperature molten salt. The ionic liquid acts as a gate dielectric with ultrahigh capacitance, enabling sheet carrier densities far in excess of those achievable with conventional oxides. By applying a modest voltage, ions accumulate at the semiconductor surface to induce strong electrostatic doping, modulating conductivity, band structure and phase transitions in monolayer and few-layer crystals. This approach has unlocked regimes of superconductivity, insulator–metal transitions and valley polarisation in materials such as graphene and transition-metal dichalcogenides. Ionic liquid gating also offers reconfigurable doping profiles for p–n junctions and neuromorphic architectures. However, challenges remain in controlling electrochemical side-reactions, ensuring device stability under ambient conditions and integrating ultrathin electrolytes into complex circuits. Recent advances in dual-gate configurations and solid-electrolyte substrates point towards scalable, high-speed and low-voltage operation, highlighting the global significance for next-generation flexible and low-power electronics.

Research from Nature Portfolio

Recent studies have demonstrated dual ionic gating by suspending a two-dimensional crystal between two ionic liquid volumes at independently controlled potentials. This geometry produces electric fields exceeding 4 V nm⁻¹, sufficient to close the bandgap of few-layer WSe₂ and drive a semiconductor-to-metal transition, thus granting access to field-induced phenomena that were previously inaccessible. In complementary work, a lithium-ion solid electrolyte substrate has been shown to match or exceed the electrostatic modulation of ionic liquids while offering improved mechanical robustness. In MoS₂ and WSe₂ transistors, it affords near-ideal subthreshold behaviour and high inverter gains under a 1 V supply, indicating a promising route to high-performance, low-voltage two-dimensional devices without the limitations of liquid handling or humidity sensitivity.

Research from all publishers

Finite-element modelling coupled with experimental validation has clarified the potential distribution in electric-double-layer-gated graphene transistors, revealing that a significant fraction of the applied bias drops within the semiconductor. By extending gate voltages to ±6 V and reducing polymer electrolyte thickness from micrometres to 10 nm, researchers have achieved additional carrier densities of up to 2.3 × 10¹³ cm⁻² without inducing unwanted electrochemistry, paving the way for very-large-scale integration. Parallel efforts in bioinspired sensing have exploited electric-double-layer gating of molybdenum disulfide and graphene to emulate synaptic behaviour, enabling low-power neuromorphic devices with high detection sensitivity. Ionic liquid gating with imidazolium-based electrolytes on copper indium selenide bilayers has further demonstrated one order of magnitude improvements in on–off ratios and mobility, showcasing the potential of two-dimensional iontronics for flexible and ultra-low-power electronics.

Ionic Liquid Gating in Two-Dimensional Semiconductor Devices publication trend

The graph below shows the total number of articles in ionic liquid gating in two-dimensional semiconductor devices across all publications each year (not limited to Nature Index journals).

Technical terms

Electrical double layer: A nanometre-scale region at the electrolyte–semiconductor interface where ions accumulate to screen electric fields, acting as a high-capacitance gate dielectric.

Ionic liquid: A room-temperature molten salt composed of organic cations and anions that provides electrostatic modulation without volatile solvents.

Two-dimensional semiconductor: An atomically thin material, such as a transition-metal dichalcogenide or graphene, with unique electronic properties at monolayer thickness.

Carrier density: The number of free charge carriers per unit area in the channel that determines electrical conductivity under gating.

Subthreshold swing: A metric of transistor switching efficiency, defined as the gate voltage change required for a decade change in drain current.

Quantum capacitance: A component of capacitance arising from the density of electronic states in a low-dimensional semiconductor, influencing the efficiency of voltage modulation.

References

1. Impact of Large Gate Voltages and Ultrathin Polymer Electrolytes on Carrier Density in Electric-Double-Layer-Gated Two-Dimensional Crystal Transistors. ACS Applied Materials & Interfaces (2023).
2. Electric-double-layer-gated 2D transistors for bioinspired sensors and neuromorphic devices. International Journal of Smart and Nano Materials (2024).
3. Lithium-ion electrolytic substrates for sub-1V high-performance transition metal dichalcogenide transistors and amplifiers. Nature Communications (2020).
4. Generating intense electric fields in 2D materials by dual ionic gating. Nature Communications (2022).
5. Electric Double Layer Field-Effect Transistors Using Two-Dimensional (2D) Layers of Copper Indium Selenide (CuIn7Se11). Electronics (2019).