Non-Volatile Memory Systems and Performance

Non-volatile memory (NVM) technologies have transformed the memory hierarchy by offering byte-addressable persistence alongside high density and low idle power. Unlike conventional dynamic random-access memory (DRAM), NVM retains data without continuous power, enabling systems to collapse the boundary between main memory and storage. Key device families include phase-change memory, resistive RAM and magnetoresistive RAM, as well as Intel Optane DC persistent memory based on 3D XPoint. These media bridge the latency and bandwidth gap between DRAM and flash while providing substantially greater capacities. However, NVM typically exhibits higher write latencies, asymmetric read/write performance and finite write endurance, demanding novel system-level optimisations. Emerging architectures combine DRAM and NVM into hybrid or heterogeneous memory systems, using software and hardware techniques to place, migrate and replicate data according to access intensity and persistence requirements. Operating-system and runtime support must manage wear-leveling, consistency and crash recovery, and must integrate seamlessly with existing programming models. Interconnect standards such as Compute Express Link now permit coherent access to memory pools across devices and nodes, further extending scope. Performance optimisation in this context involves balancing capacity, bandwidth, latency and energy consumption, while ensuring predictable endurance and data integrity for applications ranging from in-memory databases and high-performance computing to edge and IoT platforms.

Research from Nature Portfolio

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Research from all publishers

Recent studies have demonstrated portable methodologies for managing data placement across heterogeneous memory tiers. One work introduces a vendor-agnostic framework that leverages programmer-provided access traits and runtime heuristics to place data intelligently on high-bandwidth memory, DRAM or NVM. Experiments on systems combining Intel Knights Landing high-bandwidth memory with Optane DC persistent memory showed significant reductions in application slowdowns by dynamically migrating hot pages to faster media. Another line of research has focused on software-managed wear-leveling for non-volatile main memory. By approximating read and write access patterns at the operating-system level, this approach spreads both read-induced and write-induced wear evenly across the memory space without special hardware. Evaluations indicate up to three orders of magnitude improvement in effective cell lifetime, making large-scale deployment of NVM more viable. Foundational performance guidelines have also been proposed for persistent memory modules. Detailed characterisations of bandwidth and latency under real workloads have informed optimised low-level building blocks—such as log-structured writes, in-place updates and coroutine-based write hiding—that minimise persistence overhead and exploit the full potential of NVM hardware.

Non-Volatile Memory Systems and Performance publication trend

The graph below shows the total number of articles in non-volatile memory systems and performance across all publications each year (not limited to Nature Index journals).

Technical terms

Non-Volatile Memory (NVM): Semiconductor memory that retains stored information when power is removed.

Persistent Memory (PMem): Byte-addressable memory offering durable storage semantics via load/store instructions.

Hybrid Memory System: Architecture combining two or more memory technologies (e.g., DRAM + NVM) to balance performance and capacity.

Wear-Leveling: Techniques to distribute write operations evenly across NVM cells to extend device lifetime.

Data Placement: Strategies for mapping data objects to the most appropriate memory tier based on access patterns and performance goals.

References

1. An Introduction to the Compute Express Link (CXL) Interconnect. ACM Computing Surveys (2024).
2. H2M: Exploiting Heterogeneous Shared Memory Architectures. Future Generation Computer Systems (2023).
3. Software-Managed Read and Write Wear-Leveling for Non-Volatile Main Memory. ACM Transactions on Embedded Computing Systems (2022).
4. Building blocks for persistent memory. The VLDB Journal (2020).