On-Wafer Calibration Techniques for High-Frequency Transistor Characterization

Accurate characterisation of high-frequency transistors relies on on-wafer calibration methods that remove systematic errors introduced by probing hardware, cabling and substrate interactions. Such techniques establish defined reference planes at the device under test by using precision calibration standards—open, short, load and thru elements—directly patterned on the wafer. Common schemes include through-reflect-line (TRL), line-reflect-reflect-match (LRRM) and line-reflect-match (LRM) calibrations, often extended to multiline approaches to improve uncertainty budgets and extend frequency coverage. De-embedding further refines results by mathematically subtracting pad and interconnect parasitics. Calibration accuracy governs the fidelity of extracted S-parameters, small- and large-signal gain metrics, noise figures and power-added efficiency, all of which underpin transistor modelling, device optimisation and circuit design for millimetre-wave and terahertz applications. Emerging trends include automated probe alignment using MEMS-based cantilever models to ensure repeatable contact forces, advanced uncertainty propagation analyses combining Monte Carlo techniques with linearised formulations, and novel probe card architectures to suppress resonances beyond 50 GHz. Collectively, these advances enhance measurement traceability, reduce operator dependence and enable rapid evaluation of next-generation transistors on standard semiconductor platforms.

Research from Nature Portfolio

Recent studies have introduced a scalable model for tilted triangular MEMS cantilevers used as on-wafer probes, capturing the relationship between skate, overtravel and contact force in high-deflection regimes. Experimental validation with macroscopic analogues confirmed the model’s accuracy, enabling a practical procedure to eliminate lateral sliding (zero-skate) in tapered microcantilever probes. This work offers a pathway to robust, reproducible probe contact without reliance on external alignment systems, directly benefiting calibration consistency at frequencies where mechanical errors translate into significant electrical uncertainties.

On-Wafer Calibration Techniques for High-Frequency Transistor Characterization publication trend

The graph below shows the total number of articles in on-wafer calibration techniques for high-frequency transistor characterization across all publications each year (not limited to Nature Index journals).

Technical terms

On-wafer calibration: A procedure using patterned standards on a semiconductor wafer to establish reference planes for network analyser measurements.

Vector Network Analyser (VNA): An instrument that measures amplitude and phase of RF signals to extract scattering parameters of a device.

TRL calibration: A technique using through, reflect and line standards to solve for systematic errors in two-port measurements.

De-embedding: A process that mathematically removes the influence of test fixtures or interconnects from measured data.

S-parameters: Scattering parameters describing the reflection and transmission characteristics of RF networks.

Pogo-pin probe card: A probe interface using spring-loaded contacts for electrical connection to on-wafer pads, designed to minimise loss and resonance.

Uncertainty budget: A breakdown of all known sources of measurement error, quantified to evaluate overall confidence in results.

References

1. Skate, overtravel, and contact force of tilted triangular cantilevers for microcantilever-based MEMS probe technologies. Scientific Reports (2022).
2. Propagation of Linear Uncertainties Through Multiline Thru-Reflect-Line Calibration. IEEE Transactions on Instrumentation and Measurement (2023).
3. Low-Loss Pogo Pin Probe Card with a Coupling Isolation Structure up to 50 GHz. Sensors (2023).
4. Compensating Probe Misplacements in On-Wafer S-Parameters Measurements. IEEE Transactions on Microwave Theory and Techniques (2022).