Phase-Locked Loop Techniques for Grid Synchronization in Power Systems
Summary
Phase-locked loops (PLLs) form the backbone of grid synchronisation in modern power systems. By aligning the phase and frequency of converter or inverter output with the mains voltage, PLLs ensure stable power transfer and maintain power quality. Traditional synchronous reference frame PLLs employ a feedback loop to track fundamental components but can suffer under harmonics, DC offset and unbalanced conditions. Advances include second-order generalized integrator (SOGI) PLLs, moving-average-filter (MAF) based loops and adaptive notch-filter designs, all seeking to enhance dynamic response and disturbance rejection. Emerging microcontroller- and FPGA-based implementations marry low-cost hardware with sophisticated algorithms to deliver rapid, accurate phase detection across varied grid conditions. These developments are central to the integration of renewable energy sources, microgrids and smart-grid architectures worldwide.
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Phase-Locked Loop Techniques for Grid Synchronization in Power Systems publication trend
The graph below shows the total number of articles in phase-locked loop techniques for grid synchronization in power systems across all publications each year (not limited to Nature Index journals).
Technical terms
Phase-locked loop (PLL): A control structure that synchronises the phase and frequency of an output signal to a reference waveform.
Synchronous-reference-frame (SRF): A rotating coordinate system in which grid voltages appear as DC quantities for simplified control.
Second-order generalized integrator (SOGI): A specialised filter that isolates the fundamental frequency component and rejects harmonics.
Moving-average filter (MAF): A time-domain filter that averages a sequence of samples to attenuate harmonic distortion and DC offsets.
Zero-crossing detection (ZCD): A technique for identifying instants when an AC waveform crosses zero voltage, used for initial phase alignment.
References
- Sensorless microcontroller-based zero-crossing detection system for AC signals using a rounding function. Ain Shams Engineering Journal (2024).
- A Three-Phase Frequency-Fixed DSOGI-PLL With Low Computational Effort. IEEE Access (2023).
- Recent advances in synchronization techniques for grid-tied PV system: A review. Energy Reports (2021).
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