Satisfiability Problem Solving Techniques

The Boolean satisfiability problem (SAT) asks whether a given logical formula can be made true by assigning values to its variables. As the canonical NP-complete decision problem, SAT underpins a vast range of applications in computer science, from hardware and software verification to planning, cryptanalysis and combinatorial optimisation. Classic exact methods are based on backtracking search, most prominently the DPLL algorithm and its modern extension, conflict-driven clause learning (CDCL), which prunes large regions of the search space by analysing conflicts. Complementary approaches rely on stochastic local search (SLS), in which variable assignments are modified iteratively to reduce the number of unsatisfied clauses and escape local optima. Hybrid and portfolio approaches combine multiple solvers or parameter settings to exploit complementary strengths, while parallel and distributed frameworks exchange learned clauses or partial assignments to accelerate convergence. Recent advances have also explored specialised hardware implementations on field-programmable gate arrays (FPGAs) and graphics processing units (GPUs), enabling high-throughput exploration of the search space. Together, these techniques have significantly enhanced our ability to tackle increasingly large and complex satisfiability instances, with growing impact on industrial verification, optimisation tasks and the exploration of phase-transition phenomena in random instances.

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Recent work on clause-sharing solvers has demonstrated that systematic communication and buffering of learned clauses can yield substantial speedups in distributed environments. A novel solver architecture reorganises the sharing mechanism to ensure that even identical solver processes benefit from importing clauses at staggered intervals, doubling mean speedups over previous systems and solving benchmarks that had resisted earlier solvers. This approach supports elastic resource utilisation, allowing compute nodes to join or leave dynamically and enabling flexible orchestration of parallel workloads.

In the domain of hardware-accelerated search, a new FPGA-based stochastic local search solver achieves order-of-magnitude improvements in throughput compared with legacy designs. By implementing a conflict-free data rearrangement scheme, novel synchronisation methods and deep pipelining, the system sustains high-frequency parallel updates of variable assignments. Benchmarks with large clause widths see up to 110× throughput gains, illustrating the promise of customised hardware for scaling SLS techniques.

A detailed analysis of a recent international algorithm competition offers insights into the prevailing strategies driving top performance. Leading solvers combine refined CDCL heuristics, aggressive clause management and adaptive restarts with lightweight local search components. The competition report highlights emerging trends in solver portfolios, the importance of diverse benchmark selection for robust evaluation and the role of automated configuration tools in tuning solver parameters for distinct application domains.

Satisfiability Problem Solving Techniques publication trend

The graph below shows the total number of articles in satisfiability problem solving techniques across all publications each year (not limited to Nature Index journals).

Technical terms

Boolean satisfiability (SAT) problem: Decision problem of determining whether a propositional logic formula can be made true by some assignment of Boolean variables.

Conflict-driven clause learning (CDCL): Search algorithm that learns new clauses from conflicts to avoid repeating the same mistakes in backtracking.

Stochastic local search (SLS): Heuristic method that iteratively flips variable assignments to reduce unsatisfied clauses, using randomness to escape local optima.

Clause sharing: Technique in parallel or distributed SAT solvers where learned clauses are exchanged between instances to improve collective progress.

Field-programmable gate array (FPGA): Reconfigurable hardware device that allows custom parallel implementations of algorithms for enhanced performance.

References

1. MallobSat: Scalable SAT Solving by Clause Sharing. Journal of Artificial Intelligence Research (2024).
2. FYalSAT: High-Throughput Stochastic Local Search K-SAT Solver on FPGA. IEEE Access (2024).
3. SAT Competition 2020. Artificial Intelligence (2021).