Surface Roughness Effects on Carrier Mobility in Nanoscale Transistors

As transistor dimensions approach the nanometre scale, the role of surface roughness at the semiconductor–dielectric interface becomes increasingly critical in determining carrier mobility. Imperfections on the channel surface scatter charge carriers, reducing their drift velocity and degrading device performance. The interplay between quantum confinement and interface irregularities intensifies scattering rates, particularly in ultrathin bodies and two-dimensional channels. Advances in high-k dielectrics and novel channel materials have mitigated some dielectric-induced roughness, yet the fundamental challenge of atomic-scale asperities remains. Precise control of surface morphology during fabrication and refined models of roughness-induced scattering are therefore essential to sustain the continuous scaling of field-effect transistors. By elucidating the mechanisms of interface roughness scattering and its dependence on parameters such as roughness amplitude, correlation length and effective electric field, researchers aim to predict and optimise mobility in silicon, germanium and emerging compound-semiconductor devices. This topic is pivotal not only for high-performance computing and low-power electronics but also for sensors and flexible electronics, where channel dimensions and surface quality govern sensitivity and efficiency.

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Surface Roughness Effects on Carrier Mobility in Nanoscale Transistors publication trend

The graph below shows the total number of articles in surface roughness effects on carrier mobility in nanoscale transistors across all publications each year (not limited to Nature Index journals).

Technical terms

Carrier mobility: A measure of how quickly charge carriers (electrons or holes) move through a semiconductor under an electric field.

Surface roughness scattering: The deflection of carriers caused by irregularities at the semiconductor–dielectric interface.

Effective electric field: The field acting on carriers in the channel, influenced by gate bias and dielectric properties.

Two-dimensional electron gas (2DEG): A system where electrons are confined to move in two dimensions, typically at a semiconductor interface.

Quantum confinement: The restriction of carrier motion in one or more dimensions, altering energy levels and transport properties.

References

1. Superior High Transistor’s Effective Mobility of 325 cm2/V-s by 5 nm Quasi-Two-Dimensional SnON nFET. Nanomaterials (2023).
2. Formulation of Ground States for 2DEG at Rough Surfaces and Application to Nonlinear Model of Surface Roughness Scattering in nMOSFETs. IEEE Journal of the Electron Devices Society (2023).
3. Low-field electron mobility evaluation in silicon nanowire transistors using an extended hydrodynamic model. Journal of Mathematics in Industry (2018).