Carbon Nanotube Field-Effect Transistor Circuit Design

Carbon nanotube field-effect transistors (CNFETs) exploit the exceptional electrical characteristics of single-walled carbon nanotubes to create transistors with adjustable threshold voltages, high carrier mobility and low leakage currents. By selecting nanotube diameters, designers can tune the bandgap and hence the threshold voltage of individual CNFETs, enabling the direct implementation of multiple-valued logic levels within the same fabrication process. This capability has stimulated interest in ternary and other beyond-binary circuits that promise higher information density, reduced interconnect overhead and lower dynamic power consumption. Key circuit elements such as inverters, decoders, full adders and multipliers have been re-engineered using CNFETs, often employing dual-supply schemes and specialised unary-operator gates to minimise transistor count and energy–delay product. Heterogeneous integration with non-volatile elements, such as resistive memory, opens routes to in-memory computing and stateful logic. Rigorous simulation under process–voltage–temperature variations and noise-immunity tests has demonstrated robust operation, positioning CNFET-based designs as strong candidates for ultra-low-power portable electronics, Internet-of-Things devices and next-generation high-density computing architectures.

Research from Nature Portfolio

No recent Nature Portfolio content available.

Carbon Nanotube Field-Effect Transistor Circuit Design publication trend

The graph below shows the total number of articles in carbon nanotube field-effect transistor circuit design across all publications each year (not limited to Nature Index journals).

Technical terms

Carbon nanotube field-effect transistor (CNFET): A transistor in which the channel is formed by one or more carbon nanotubes, offering high mobility and tunable threshold voltage via nanotube diameter selection.

Threshold voltage (Vth): The gate-to-source voltage at which a transistor channel begins to conduct; in CNFETs, it is adjusted by selecting the nanotube’s bandgap.

Multiple-valued logic (MVL): A logic scheme using more than two discrete voltage levels per signal, increasing information capacity and reducing interconnect density compared to binary logic.

Power–delay product (PDP): A figure of merit for digital circuits, defined as the product of switching energy and propagation delay, used to assess energy efficiency.

Energy–delay product (EDP): An extension of PDP that weights energy and delay equally; used to evaluate trade-offs between performance and power consumption.

References

1. Ultra-Low Energy CNFET-Based Ternary Combinational Circuits Designs. IEEE Access (2021).
2. Novel Ternary Adder and Multiplier Designs Without Using Decoders or Encoders. IEEE Access (2021).
3. Ternary Full Adder Designs Employing Unary Operators and Ternary Multiplexers. Micromachines (2023).
4. Carbon Nanotube and Resistive Random Access Memory Based Unbalanced Ternary Logic Gates and Basic Arithmetic Circuits. IEEE Access (2020).