Introduction

Ferroelectric materials leverage the local field enhancement effect arising from their non-volatile polarization fields, enabling a broad spectrum of applications in non-volatile memory, in-memory computing, and neuromorphic systems1,2,3. However, during the operation of ferroelectric devices, the reversal of ferroelectric polarization (FE) is often accompanied by charge trapping (CT) at trapping sites. Both ferroelectric polarization and charge trapping are highly sensitive to the applied electric field, yet these two mechanisms are inherently competing. The electric field generated by charge trapping opposes the ferroelectric polarization field, introducing a complex interplay that influences device performance.

Realizing effective modulation between FE and CT is crucial for studying device physics, optimizing performance, and expanding their range of applications. Given that the CT and FE reversal occur simultaneously under an electric field but in opposing directions. It presents a significant challenge to cooperate FE and CT due to the inherent opposition of the two mechanisms and the uncontrollable charge trapping types in ferroelectric materials such as Pb(Zr,Ti)O3 (PZT), Hf0.5Zr0.5O2 (HZO), and van der Waals layered CuInP2S6 (CIPS)4,5,6,7. Previous ferroelectric transistors mainly focused on the coupling between the FE of the ferroelectric layer and the interface CT, while ignoring the regulation effect of the carriers in the semiconductor layer on the ferroelectric polarization. Consequently, there is a trade-off between FE and CT, and the random transition between FE and CT remains unsolved in this field8,9,10,11. Achieving more precise control between FE and CT and understanding the transition mechanism in ferroelectric transistors requires a nuanced device and materials design to balance these conflicting dynamics effectively.

Recently, hybrid organic-inorganic perovskite ferroelectrics (HOIPFs) have attracted considerable attention due to their distinct ferroelectric mechanisms, optoelectronic properties, and customizable structures12,13. Different from all organic or inorganic ferroelectric materials, by engineering the organic cations and inorganic skeletons of HOIPFs, their ferroelectric and charge properties can be tailored for specific applications14,15. Additionally, HOIPFs typically exhibit low defect formation energy, especially the halide vacancies, providing intrinsic charge trap sites with minimal impact on their ferroelectric properties, which is mainly induced by the ordered orientation of organic cations14,16,17. Therefore, HOIPFs with intrinsic trapping sites offer promising avenues for achieving precise control of FE and CT modulations.

Herein, we elucidate the transition mechanism between FE and CT in two-dimensional ferroelectric heterojunction transistors (2DFHTs) using TCAD simulations by designing trapping types in the ferroelectric layer and tailoring the semiconductor carrier. To experimentally confirm the findings, HOIPF material with combined ferroelectric polarization and electron capture properties is employed as the ferroelectric layer, enabling polarity-dependent FE and CT transition in 2DFHTs. The device exhibits CT and FE controlled hysteresis in electron-majority n-type and electron-minority p-type 2DFHT, respectively. More importantly, the two opposing mechanisms can be dynamically switched in bipolar 2DFHTs, enabling heterogeneous control of non-volatile FE and volatile CT states. By harnessing the synergy between FE for long-term memory storage and CT for real-time weight updates, the bipolar 2DFHTs significantly enhance the recognition accuracy from 80.9% to 92.9% and boost training efficiency by 20.7 times in a transfer learning network.

Results

Competition mechanism between FE and CT and polarity-dependent ferroelectric modulation

The ferroelectric field-effect transistors (FeFETs) with a ferroelectric dielectric layer provide a designable platform for functionalized devices through capacitance coupling between the ferroelectric polarization field and the semiconductor. In FeFETs, a non-volatile ferroelectric polarization field aligns parallel to the gate electric field. This alignment modulates the behavior of charge carriers in the semiconductor layer, leading to distinct hysteresis loops. Specifically, p-type FeFETs exhibit a clockwise hysteresis loop, while n-type FeFETs display an anticlockwise loop (Fig. 1a)18,19. These ferroelectric hysteresis loops highlight the significant potential of FeFETs for applications in multi-level memory and in-memory computing1,3,20. However, the ferroelectric polarization in FeFETs is often eliminated by the CT at the trapping sites21,22,23. In contrast to the FE mechanism, the CT generates an inherent field opposite to the gate electric field, leading to an unavoidable presence of non-switching “dead layers”. The non-switching layers generate a depolarization, which impedes polarization flipping of ferroelectric materials, resulting in hysteresis loops with opposite directions—anticlockwise for p-type transistors and clockwise for n-type transistors (Fig. 1b), typically resulting in a volatile synaptic weight update. Therefore, limited by the trade-off between the opposite mechanisms of FE and CT, conventional FeFET exhibits an “all or none” homogeneous regulation mechanism of ferroelectric polarization both in the n-type and p-type transistors. Developing a new competition mechanism and realizing a controllable transition between FE and CT remain unsolved in this field.

Fig. 1: The schematic of the competition mechanism between FE and CT and the proposed polarity-dependent ferroelectric heterogeneous operation.
figure 1

a Hysteresis of non-volatile FE polarization dominated n-type and p-type FET. b The hysteresis of volatile CT dominated n-type and p-type FET. c The schematic of the FeFET structure utilized in the TCAD simulation with a FE layer with inherent electron trapping sites. d The transfer curves of simulated n-type MoS2 and p-type BP FeFET, exhibiting a semiconductor polarity-dependent macroscope ferroelectric control. e The comparison of electron trapping density in the ferroelectric layer of n-type MoS2 and p-type BP FeFET, respectively. f The schematic of the mechanism of the semiconductor polarity-dependent ferroelectric control in FeFET.

Full size image

To systematically analyze the coupling between FE, CT, and channel carriers in FeFET, as a qualitative analysis, the TCAD numerical methods are utilized. Figure 1c illustrates the schematic structure of the simulated FeFET, in which n-type MoS2 and p-type phosphorene (BP) are introduced as the semiconductor layer, and the electron trapping sites are set at the ferroelectric/semiconductor interface and the bulk of the ferroelectric layer, respectively. The hysteresis behaviors of n-type MoS2 FeFET are simulated under the adjustment of ferroelectric polarization strength and electronic trapping position and density, the detailed calculation and materials information are shown in the supporting information. Supplementary Figs. 1-2 illustrate the coupling behavior between ferroelectric polarization and charge trapping at the semiconductor/ferroelectric interface, while Supplementary Fig. 3 shows similar effects arising from bulk traps within the ferroelectric layer. These results clearly demonstrate that similar competing interactions between ferroelectric switching and charge trapping can emerge from different trap-site configurations, depending on the polarization magnitude and trap density. The hysteresis of n-type MoS2 FeFET exhibits a shift from a FE, transition state to CT-controlled state with the reduction of interface and bulk trapping density or the enhancement of FE polarization strength, which is consistent with previous works24. Regrettably, previous research has primarily focused on FE and CT within the ferroelectric layer, leaving the impact of channel carriers on ferroelectric modulation largely unexplored. Through the TCAD simulations, we reveal that the ferroelectric polarization is not merely governed by the spatial distribution of traps but also critically depends on the type of trap and the polarity of the semiconductor channel. Specifically, n-type MoS2 FeFET exhibits a clockwise CT-based loop, whereas p-type BP FeFET under similar conditions shows a clockwise FE-dominated loop (Fig. 1d). This finding uncovers an unprecedented heterogeneous regulatory mechanism across demonstrating how trap engineering and channel polarity can be leveraged to either suppress or enhance ferroelectric behavior. Figure 1e shows the interface CT density of the n-type and p-type transistors, respectively, revealing a higher trapped electron density at the ferroelectric layer in the n-type transistor. This polarity-dependent macroscopic ferroelectric polarization is attributed to the built-in field caused by the trapped electrons that act as a blocking field, preventing the switch of FE dipoles (DP). To further confirm the impact of electron defects on ferroelectric switching, we conducted transient simulations of polarization and trap dynamics under pulsed gate voltages (Supplementary Fig. 4). The results show that the presence of electron traps reduces the remanent polarization, indicating suppressed ferroelectric switching. Moreover, n-type MoS₂ transistors exhibit higher trapped electron densities than p-type devices under voltage pulses, supporting the proposed polarity-dependent modulation mechanism driven by asymmetric charge trapping. The mechanism is summarized in Fig. 1f: in FeFET with electron trapping sites, the n-type semiconductor with electrons majority carrier enhances electron trapping under positive gate voltage. This induces a significant built-in field, which acts as a depolarization field that prevents the flipping of FE dipoles, thereby eliminating macroscopic ferroelectric behaviors1,25. In contrast, the trapped electron in p-type FeFET is insufficient to form an adequate built-in field. Thus, the ferroelectric dipole can be flipped and aligned to the gate electric field, resulting in the FE polarization hysteresis. Note that our model is constructed under a set of idealized assumptions and is not intended to yield quantitatively identical results to experimental measurements. The qualitative trends revealed by our simulations, together with the experimentally observed device behaviors, support the proposed mechanism.

Characterization of 2D hybrid organic-inorganic ferroelectric perovskite materials

To experimentally illustrate the polarity-dependent ferroelectric modulation, 2D hybrid organic-inorganic ferroelectric perovskite materials, (EATMP)PbBr4 (EATMP= (2-aminoethyl)trimethylphosphanium), simpified ETPB) were synthesized26. As shown in Fig. 2a and Supplementary Fig. 5, ETPB is <100 > -oriented 2D Dion-Jacobson phase perovskite, wherein adjacent perovskite layers are interconnected by diamine cations (EATMP). At room temperature, the ordered alignment of EATMP molecules along the crystallographic b-axis induces spontaneous polarization parallel to the perovskite plane (in-plane) in ETPB. Figure 2b showcases the powder and thin film X-ray diffraction (XRD) pattern of the synthesized compounds, aligning well with the simulated XRD pattern derived from the structure solved by single crystal X-ray diffraction, indicating the successful synthesis of ETPB in our experiments. Due to the preferred orientation commonly observed in hybrid perovskite thin films, specific crystallographic planes are preferentially aligned with respect to the incident X-ray beam, resulting in the enhancement of certain diffraction peaks and the suppression of others. The absence of 17.2° and 22.5° diffraction peaks is attributed to the strong preferential orientation along the (00 l) direction, suppressing reflections from other planes not aligned with the incident X-ray beam. Meanwhile, the slight tilt in the film allows limited exposure of off-axis planes, leading to weak peaks at 11.5° and 16.5 °. The XRD pattern of the thin film displays prominent peaks corresponding to crystallographic planes (0,0,l), affirming the well-preserved perovskite structure in the thin film. Meanwhile, peaks at around 11.5°, 16.5°, and 27.4° correspond to crystallographic planes (0,1,1), (1,1,0), and (2,2,−2), respectively, indicating a tilted crystal orientation of the perovskite film relative to the substrate, as shown schematically in Fig. 3c and Supplementary Fig. 627,28.

Fig. 2: The characteristic of ETPB ferroelectric materials.
figure 2

a The top view and side view structure of ETPB, showing the spontaneous polarization along the b-axis is due to the ordered alignment of C-N bonds in each EATMP cation. b The XRD patterns of simulated results from single crystal structure results, as synthesized samples and the spin-coated thin films. c The schematic of the tilted-oriented ETPB in the thin film. Panels d and e show the box-in-box out-of-plane (OOP) phase switch of the ferroelectric thin film driven by the tip bias, confirming the OOP FE field switch. The scale bar in each image is 6 μm.

Full size image
Fig. 3: The DFT calculation of ETPB conforming to the inherent electron trapping sites.
figure 3

a The unit cell model of ETPB material for first-principles calculations. b The differential charge mapping of ETPB with Br vacancy, indicating electron trapping sites for Br vacancy. c, d The DOS calculation of ETPB with and without Br2 vacancy, respectively, indicating the electron trapping properties of ETPB. e The theoretical prediction of the Fermi level shift induced by the absence of bromide atoms.

Full size image

The tilted orientation of the crystals gives rise to spontaneous polarization projecting vertically and horizontally to the substrate, which was further investigated through thin film piezo-electric force microscopy (PFM) measurements. Figure 2d, e and Supplementary Figs. 7-8 present the topography, vertical/horizontal PFM phase, and amplitude images over a 30 × 30 μm area of the sample. The scanning area presents vertical and horizontal piezoelectric responses, with the phase contrast map significantly independent of topography, suggesting spontaneous polarization in both vertical and horizontal directions. We further conducted a square box scan (10 × 10 μm) with a −12 V DC tip voltage, followed by an in-box scan (5 × 5 μm) with a + 12 V DC tip voltage to execute the poling operation. As illustrated in Fig. 2e, the non-destructive topography indicates that the perovskite thin film maintains its integrity well during the poling operation. After box poling, an identical phase signal was observed in both vertical and horizontal phase images, resulting in an opposite phase signal and switchable ferroelectric domains in the opposite direction. In addition to the PFM data, we have further characterized the ferroelectric properties of the ETPB film by measuring its polarization–electric field (P–E) hysteresis loops at various test frequencies and sweep voltages. As shown in Supplementary Fig. 9, the ETPB film exhibits a well-defined hysteresis loop with a coercive field of 0.3 MV/cm and a remanent polarization of 1.1 μC/cm² at a test frequency of 50 Hz and a sweep voltage of 5 V, confirming its intrinsic ferroelectric behavior. The other physical property characterization of ETPB, including second harmonic generation, differential scanning calorimetry, and thermogravimetric analysis are shown in Supplementary Fig. 10, revealing the stable ferroelectric properties of materials at room temperature.

In hybrid perovskite thin films, halide vacancies significantly influence charge formation, thereby affecting electronic properties, charge transport, and band structure. Figure 3a illustrates the pristine unit cell model used for first-principles calculations. In the lead–bromide (Pb–Br) perovskite octahedron, the bromide atoms are labeled as Br1 to Br4 based on their coordination environment. To assess the charge properties of ETPB lacking bromide atoms, we calculated the differential charge density map for the Br2 vacancy as a representative example. As shown in Fig. 3b, there is notable charge accumulation near the Br2 vacancy, suggesting that this vacancy serves as an electron-trapping site. Further insights are provided by the density of states (DOS) diagrams for ETPB with and without Br2 vacancies, obtained from density functional theory (DFT) calculations (Fig. 3c, d). Compared to pristine ETPB, the absence of a Br2 atom leads to an increase in DOS near the conduction band minimum, indicative of electron trapping at the Br2 vacancy. Similar trends are observed in the DOS diagrams for other independent Br vacancies, as presented in Supplementary Fig. 11, reinforcing the notion that the inherent electron trapping site in ETPB films is associated with Br vacancies. Consequently, Br vacancies in ETPB contribute to an upward shift of the Fermi level towards the conduction band minimum, while also introducing a charge level below the Fermi level within the bandgap, indicating the presence of electron trap states (Fig. 3e)29,30. The coupling of electron charges and internal ferroelectricity in perovskite thin films presents the potential for developing unprecedented functional devices.

2D ferroelectric perovskite heterojunction transistor

Compared to bulk semiconductors, 2D van der Waals (vdW) materials exhibit distinct characteristics such as pristine interfaces and reduced screening effects. These properties make them highly responsive to an electrostatic field induced by polarization, enabling efficient modulation of the ferroelectric coupling between charge-trapping and channel carriers31,32,33. After the synthesis of ferroelectric material embedding with electron trapping sites, the coupling mechanism depicted in Fig. 1 is experimentally validated through the fabrication of three 2DFHTs, wherein n-type MoS2, bipolar WSe2, and p-type BP semiconductor layers are deposited onto the ETPB layer. The experimental process is detailed in the corresponding section. Atomic force microscope (AFM) images of the ETPB film and 2DFHT devices are provided in Supplementary Figs. 12-13, respectively. These images confirm the strong attachment between the 2D channel material and the 40 nm thick ETPB ferroelectric film, and the channel thicknesses of MoS2, WSe2, and BP are 5 nm, 8 nm, and 17 nm, respectively. Raman spectroscopy analysis of the semiconductors demonstrates consistency with the ETPB/semiconductor heterojunction, indicating that the ETPB layer preserves the inherent material properties of the 2D semiconductor layers (Supplementary Fig. 14).

The double-sweep transfer curves for three distinct transistors were analyzed in Fig. 4a–c. Specifically, the n-type MoS2 2DFHT demonstrates CT-dominated clockwise hysteresis during the sweep, while the p-type BP 2DFHT displays FE-dominated clockwise hysteresis, affirming the semiconductor polarity-dependent macroscope ferroelectric polarization predicted by TCAD simulation. Intriguingly, the bipolar WSe2 2DFHT reveals a distinctive behavior, with the transfer curve exhibiting clockwise hysteresis in both the p-region (0 to −60 to 0 V) and n-region (0 to 60 to 0 V). This dual-mode operation is characterized by FE in the p-region and a CT-dominated mechanism in the n-region, suggesting that both phenomena, though typically opposing, can be macroscopically integrated within a single device through semiconductor polarity and charge-trapping design. We further extract the key properties of the device, as shown in Supplementary Fig. 15, the bipolar 2DFHTs exhibit a high on/off ratio of 3 × 10⁶ and a peak mobility of 195 cm2 V-1 s-1 in the p-type regime, representing state-of-the-art performance among reported ferroelectric transistors (Supplementary Table 2). To illustrate the reproducibility of polarity-dependent macroscopic ferroelectric control, Supplementary Fig. 16 shows the transistor performance of different 2DFHTs, which exhibit acceptable device variations and the same hysteresis direction with Fig. 4a–c. This device variation can be further improved by critical design of experimental process and the used of chemical vapor deposition (CVD) grown large-scale 2D materials. The impact of the gate voltage sweep range on the macroscopic ferroelectric polarization of 2DFHTs is also evident. As shown in Fig. 4d–f, the transfer characteristics of three 2DFHTs were measured across gate voltage ranges from ±30 V to ±60 V. In MoS₂-based 2DFHTs, a CT-dominated behavior is observed where the hysteresis loop exhibits a clockwise direction and the window expands with increasing gate sweep range. In contrast, for the p-region of WSe₂ and BP 2DFHTs, a transition from CT-controlled hysteresis to FE-dominated hysteresis occurs as the gate voltage amplitude exceeds 40 V, since the hysteresis direction changes from anticlockwise to clockwise. This suggests that a sufficient coercive electric field is required to induce ferroelectric polarization reversal. Moreover, the FE-dominated characteristics are observed exclusively in electron-minority semiconductors, further supporting the proposed mechanism of polarity-dependent ferroelectric modulation.

Fig. 4: Experiment validation of polarity-dependent macroscope ferroelectric in 2DFHT.
figure 4

The double sweep transfer curve of a n-type MoS2-based device, showing the CT induced clockwise hysteresis loop; b bipolar WSe2 based device, showing the FE driven anticlockwise loop in p-region and CT induced clockwise loop in n-region; c p-type BP based device, showing the ferroelectric driven anticlockwise hysteresis loop, insert pictures are the microscope images of each 2DFHT device with a scale bar of 10 μm. The sweep range dependent transfer curves of d n-type MoS2-based device, e p-region of WSe2, showing transition of CT induced loop (below −40 V) to FE-driven loop (above −40 V); f p-type BP based device, exhibiting the same trend with Fig. 4e. g The volatile to non-volatile transition modulated by the amplitude of gate voltages, exhibiting a channel current modulation mode transition from CT control to FE control. h The combination of gate spike-dependent non-volatile memory and volatile weight update in WSe2 2DFHT.

Full size image

Given that ion migration in halide perovskite materials can also screen the ferroelectric polarization electric field, sweep rate-controlled and sweep times measurements of the 2DFHTs were conducted (Supplementary Figs. 17-18) to assess and minimize the influence of ion migration. The sweep rate is obtained by dividing the sweep voltage range by the sweep time, with the same current range in each device. The hysteresis windows of the p-region of WSe2 and BP transistor exhibit minimal variation when the sweep rate increases from 2.2 V/s to 38.7 V/s, consistent with the FE-controlled mechanism8. In contrast, the hysteresis windows of MoS2-based 2DFHT expand as the sweep rate decreases, aligning with the CT mechanism. Moreover, the control experiments, shown in Supplementary Fig. S19, with MoS2, WSe2, and BP transistors on Si/SiO2 substrates without ETPB layers, confirm the critical role of the ferroelectric layer in polarity-dependent control.

The demonstrated synergy between FE and CT enables simultaneous non-volatile memory and volatile synaptic weight updates in WSe2 2DFHT. Supplementary Figs. S20–22 illustrate the characteristic short-term synaptic weight updates and long-term memory retention, both of which are modulated by the gate voltage, enabling the transition between FE and CT mechanisms. The channel currents of FE and CT mechanisms are summarized in Fig. 4g, indicating a volatile current decay under the CT mode (small gate voltage), whereas long memory retention at the FE mechanism (large gate voltage). The device’s dual functionality on demand supports both real-time data processing and long-term storage of learning outcomes. Additionally, Fig. 4h exhibits the device’s multi-level non-volatile memory capabilities and CT-dependent synaptic analog weight updates under varying memory states. When a −60 V pulse with varying widths from 10 ms to 5 s is applied, the device exhibits non-volatile multi-level memory characteristics. More importantly, after applying a −60 V gate voltage pulse with different durations, small gate voltage pulses of −10 V are introduced, enabling volatile weight updates based on different memory states. This demonstrates the seamless integration of non-volatile storage and volatile weight updates, highlighting the feasibility of retraining weights based on preserved feature information. The observed gate spike-dependent multi-level memory behavior originates from the ferroelectric polarization switching in the ETPB layer. The applied -60 V gate pulse exceeds the coercive voltage, and longer pulse durations enable more complete polarization switching, resulting in a greater modulation of channel current. This time-dependent response is consistent with the sweep-rate-dependent measurements (Supplementary Fig. 17), where reduced current at faster sweeps reflects shorter effective polarization time. Such heterogeneous integration of volatile and non-volatile functionalities opens up substantial prospects for advancing fast, efficient, and intelligent neuromorphic computing.

2DFHT based high efficiency transfer learning neural network

Transfer learning techniques present previously acquired features from a related task, thereby circumventing the need to retrain models from scratch, which significantly expedites both the training speed and efficiency34,35,36. However, the challenge of using a single non-volatile device for both simultaneous training and feature memory storage stems from the differing memory property requirements during the training and inference phases2,37,38. In our approach, the non-volatile ferroelectric retains extracted features, while volatile CT facilitates real-time weight updates, allowing bipolar 2DFHTs to seamlessly integrate data processing and long-term memory storage. To demonstrate the conceptual feasibility of leveraging these “all-in-one” device properties, we implemented a proof-of-concept deep neural network optimized for transfer learning, as illustrated in Fig. 5. In this framework, the synergistic interplay between FE and CT mechanisms enables functionally reconfigurable synaptic behavior. By preserving pre-learned feature representations, the system illustrates the potential for enhanced training efficiency and classification accuracy. As shown in Fig. 5a, the network was initially pre-trained on the ImageNet dataset, enabling essential feature extraction and storage. The stored representations were then leveraged for subsequent training on the CIFAR-10 dataset, circumventing the need for full retraining. The neural network architecture (Fig. 5b) consists of a convolutional layer for feature extraction and a fully connected layer for classification, where 2DFHT-based synapses enable real-time weight updates.

Fig. 5: 2DFHTs-based transfer learning simulation for high-efficiency neural network.
figure 5

a Pre-learning images from the ImageNet database for transfer learning. b The schematic of a transfer learning neural network consists of a convolutional neural network and a fully connected network. c Comparison of accuracy between networks with frozen and unfrozen feature information during the training epoch. d, e Heat map of the confusion matrix obtained by testing the network on the test set of Cifar−10 with and without feature memory. f Comparison of time consumption between networks with and without feature memory. g The accuracy and recognition time for reaching an 80% accuracy of the two networks. h Comparison of loss between the two networks.

Full size image

To realize efficient synaptic weight modulation, we utilized a differential pair circuit (Supplementary Fig. 23) to emulate negative synaptic weights, improving network performance. The weight update characteristics of 2DFHTs were evaluated under 50 positive 10 V pulses and 50 negative 10 V pulses (Supplementary Fig. 24a), and the resulting conductance states were normalized to construct a differential conductance matrix ranging from −1 to 1 (Supplementary Fig. 24b). This matrix was subsequently mapped onto a device-level neural network simulation, in which initial synaptic weights were pre-computed by a peripheral processor and then translated into effective conductance states of 2DFHT-based synapses. During training, the number of positive or negative voltage pulses can be determined and further applied to the gate electrodes of 2DFHTs to achieve the conductance update, while image data was encoded as voltage signals at the drain electrodes. The final classification output was obtained through the weighted summation of input signals and dynamically modulated conductance states. Due to the current limitations in device scalability caused by the mechanical exfoliation-based fabrication process, this simulation is performed using experimentally extracted idealized device characteristics. By leveraging this transfer learning approach, 2DFHTs-based networks exhibited substantial improvements over conventional architectures that lack feature preservation. As shown in Fig. 5c, networks utilizing pre-learning features achieved 80% accuracy within just two training epochs and ultimately reached 92.9%, compared to 80.9% for networks trained from scratch. The superiority of this approach is further corroborated by confusion matrices (Fig. 5d, e), highlighting enhanced classification precision across CIFAR-10 categories. Beyond accuracy improvements, 2DFHT-based networks demonstrated remarkable efficiency gains. As shown in Fig. 5f, the time required per training epoch was reduced to 30 s, compared to 41 s in conventional models. Notably, the time to achieve 80% accuracy was reduced by a factor of 20.7 times, underscoring the efficiency advantage of 2DFHTs in neuromorphic computing (Fig. 5g). Loss characteristics (Fig. 5h) further confirm the stability and convergence of the training process. These results establish 2DFHTs as a powerful platform for energy-efficient neuromorphic computing, seamlessly integrating memory storage and dynamic weight updates within a single device.

Discussion

In summary, we demonstrate a polarity-dependent ferroelectric heterogeneously controlled mechanism by integrating an HOIPF layer with embedded electron traps and modulating semiconductor carriers, validated through TCAD simulations and DFT calculations. The 2DFHT demonstrates a FE and CT behavior in electron-majority and electron-minority devices, respectively, and achieves a reversal transition by the modulation of semiconductor polarity and the applied electric field. Consequently, a synergy between non-volatile FE polarization memory and volatile CT induced real-time synaptic weight update was achieved in a single bipolar 2DFHT. By incorporating experimentally extracted performance of the bipolar devices, the transfer learning neural networks exhibit significantly enhanced learning capabilities, improving recognition accuracy from 80.9% to 92.9% and 20.7 times training efficiency compared to networks lacking feature preservation.

Methods

Basic characterization of the (EATMP)PbBr4

The powder XRD data were measured by a Bruker D2 Focus Powder X-ray diffractometer on the powder sample. The thin film XRD was collected by the same instrument on the thin film sample. Thermo Gravimetric Analysis (TGA) was measured by TA Instruments Trios V3.1 thermogravimetric analyzer from 300 K to 950 K under a nitrogen gas atmosphere. The Differential Scanning Calorimetry (DSC) data were collected by Mettler-Toledo DSC under a nitrogen gas atmosphere at a rate of 15 K/min in both the cooling and heating processes. Second harmonic generation (SHG) was excited by a femtosecond laser beam at a wavelength of 800 nm.

Piezoelectric force microscopy (PFM) measurements

Piezoelectric force microscopy (PFM) was carried out by the atomic force microscopy system (Bruker Dimension FastScan) in piezoresponse-vertical and horizontal domains mode in a nitrogen atmosphere glove box. The sample was spin-coated on a conductive silicon wafer to realize the poling operation. The SCM-PIT-V2 probe was used to interact with the sample for the generation of morphology, phase, and amplitude signals, and to apply the DC voltage for switching the ferroelectric domain. Due to the tilted polarization direction of ETPB, a poling voltage exceeding the coercive field is required to compensate for the misalignment between the electric field direction and the polarization vector, therefore, a poling voltage of 12 V is used for the poling measurement.

P-E loop measurement

The P-E loop tests were measured in aixacct TF 3000 in the dynamic hysteresis model under different frequencies and voltages. The sample was prepared via spin coating with a thickness of 40 nm and an electrode area of 40000 µm2

Device fabrication and electronic measurement

The prepared (EATMP)PbBr4 powder is dissolved in a mixed solution of N, N-dimethylacetamide (DMF): Dimethyl sulfoxide (DMSO) in a ratio of 4:1 and heated at 80 °C for 24 h. Before depositing the ferroelectric layer, the silicon wafer with 100 nm SiO2 is plasma bombarded for thirty minutes to make the surface completely hydrophilic. A 40 nm thickness ferroelectric layer was then deposited by spin coating at 600 rpm for 6 s and 4000 rpm for 40 s followed by annealing at 100 °C for 10 mins in a nitrogen atmosphere. The n-type MoS2, bipolar WSe2, and p-type BP are transferred onto the ferroelectric layer as the semiconductor layer of the transistors by the polydimethylsiloxane (PDMS) stamp-assisted dry transfer method. The 2D material was first exfoliated onto a PDMS stamp with low viscosity, and a suitable flake was identified under an optical microscope. Using a precision transfer platform, the selected 2D material was then transferred from the PDMS stamp onto the ferroelectric substrate. Noted that BP can be easily oxidized, the stripping and transfer processes are completed in the glove box.

Finally, 50 nm gold is thermally evaporated on the transferred semiconductor layer through a mask as the source and drain electrodes to complete the device preparation. All electrical tests are completed under vacuum using a Keysight B1500 semiconductor analyzer.