A novel hierarchical control strategy for enhancing stability of a DC microgrid feeding a constant power load

Abstract

In recent years, DC microgrids supplying constant power loads (CPLs) have attracted significant attention due to their impact on overall system stability, which is attributed to their electrical characteristics that exhibit negative incremental impedance. This paper examines a secondary control strategy aimed at ensuring accurate power sharing and voltage restoration within an islanded DC microgrid supplying a constant power load. The droop control function is typically used in the primary control layer to facilitate power sharing among distributed generators (DGs). However, differing load profiles may cause the DC bus voltage to deviate from its nominal value. To restore the DC bus voltage to its nominal value while maintaining accurate power sharing, a primary and secondary control scheme is proposed. This scheme employs an integrated control strategy combining sliding mode control for the primary control level and H-infinity control for secondary control. The approach is based on a two-time-scale stability analysis, i.e., the settling time of the primary control must be faster than that of the secondary control. Additionally, compared to most existing methods, the proposed approach requires no global information and depends exclusively on DC bus voltage feedback, eliminating the need for passive loads in parallel with the CPL. A test system of an islanded DC microgrid feeding a CPL is created using Matlab and PSIM software to assess the proposed method. An experimental prototype comprising two DGs and a tightly voltage-controlled boost converter emulating a CPL is developed to demonstrate the proposed approach and confirm the theoretical results.

Introduction

The growing demand for efficient, reliable, and sustainable energy systems has driven significant interest in innovative power generation and distribution methods. The integration of renewable energy sources, combined with advancements in power electronics and digital controllers, has accelerated the adoption of distributed generation and microgrid (MG) technologies. This shift not only supports a diversified energy mix but also enables localized energy production, enhancing system reliability and reducing transmission losses, making MGs a key component in the development of modern energy infrastructure. MGs integrate distributed generation units (DGs), energy storage systems, and local loads, forming a flexible and resilient power structure. This design enhances energy management and improves system stability, particularly when integrating variable renewable sources such as solar and wind power^1,2.

MGs are categorized based on the type of coupling bus: alternating current (AC) MGs, direct current (DC) MGs, and hybrid AC/DC MGs. Each configuration is suited to specific applications and operational requirements, providing flexibility that enables MGs to play a critical role in advancing renewable integration and enhancing grid reliability within modern power systems^3,4.

This paper primarily focuses on DC MGs, particularly those supplying constant power loads (CPLs). These systems typically operate in an islanded mode, as shown in Fig. 1. DC MGs are especially well-suited for applications where precise load control and stability are crucial, offering a practical and efficient solution for integrating renewable energy while maintaining system reliability^5,6,7.

Fig. 1

Typical DC microgrid with CPLs.

In islanded DC MGs, droop control is commonly used within the local controllers of DGs to achieve balanced power sharing. This decentralized approach allows each DG to produce an equal current output, effectively distributing the load across the system without requiring inter-unit communication. However, the implementation of droop control introduces a trade-off between power-sharing accuracy and voltage regulation. While it improves load sharing, droop control often compromises voltage regulation, causing the DC bus voltage to deviate significantly from its desired reference value. External disturbances and the influence of CPLs exacerbate voltage deviations, making it challenging to maintain the stability of the DC bus at its desired level^8,9,10.

To address these limitations, a secondary control strategy is introduced for DC MGs supplying CPLs. This strategy includes a secondary voltage compensation controller specifically designed to enhance voltage regulation and ensure system stability. In this approach, the voltage deviation error is detected and processed by an appropriate controller, which then sends a corrective control signal to all DGs to maintain the desired voltage^11,12,13,14.

Despite these advancements, certain challenges remain. A suitable model must be developed to effectively design the controller and mitigate the destabilizing effects of CPLs, which are known to be a source of instability in DC MGs when the controller is insufficient. In particular, CPLs are nonlinear loads that exhibit incremental negative impedance (INI) characteristics, meaning that a decrease in output voltage leads to an increase in output current, and an increase in voltage causes a reduction in current. This nonlinear behavior complicates control efforts, as it requires a specific strategy to stabilize the common DC bus of the DC MG¹⁵. CPLs are prevalent in applications such as aircraft, electric vehicles, ships, and telecommunications, highlighting the need for robust control to manage their effects and ensure stability in DC MGs^16,17.

The presence of CPLs in DC MGs produces instability, irised by the INI effect, destabilizing the system and causing issues with voltage stabilization and power sharing among DGs. The complex dynamics of hierarchical control and CPLs complicate stability analysis, requiring advanced control strategies to maintain stable operation and ensure balanced power distribution. Various solutions have been proposed to address these challenges, and the following literature review investigates these strategies and their effectiveness in enhancing stability and power sharing in DC MGs. In¹⁸, a comprehensive review of hierarchical control strategies for DC MGs is presented, emphasizing the importance of secondary control in maintaining voltage stability and power balance under varying load conditions. The authors in¹⁹ propose a secondary control method for standalone DC MGs that enhances voltage regulation, load sharing, and reduces line losses, thereby improving overall system performance. In²⁰, the challenges posed by CPLs in droop-controlled DC MGs are addressed, suggesting methods to mitigate instability and ensure robust operation. In²¹, the authors introduce a cooperative decentralized tertiary control approach for DC MGs with renewable distributed generation, focusing on coordinated voltage regulation and power sharing among multiple energy sources. In²², the authors analyze CPLs in droop-controlled MGs for more electric aircraft applications, highlighting the need for robust control strategies to maintain system stability.

A novel secondary optimal control is developed in²³ for multiple battery energy storage systems in a DC MG, aiming to improve voltage stability and efficient power management. A distributed secondary control method is proposed in²⁴, using averaging virtual current derivatives to improve voltage regulation and system resilience against disturbances. An enhanced droop control method, presented in²⁵, ensures accurate load sharing and voltage regulation in islanded and interconnected DC MGs, addressing issues related to proportional load distribution. The authors in²⁶ utilize neural networks to achieve voltage recovery and current sharing in DC MGs with uncertain CPLs, demonstrating the potential of artificial intelligence in MG control. In²⁷, a review of power sharing, voltage restoration, and stabilization techniques in hierarchical controlled DC MGs is provided, offering insights into various control methodologies and their effectiveness.

In²⁸, the authors conduct control and stability analysis of DC MGs with CPLs and source disturbances, proposing strategies to enhance system robustness. The authors in²⁹ assess the performance of reverse droop control for multi-DER cooperative DC MGs, offering solutions for improved voltage regulation and load sharing. A finite-time synergetic controller is proposed in³⁰ for DC MGs with CPLs, achieving rapid system stabilization and improved dynamic response. An adaptive damping control is introduced in³¹ for load-side converters to mitigate instability in DC MGs caused by CPLs, enhancing system reliability. The authors in³² focus on the detection and mitigation of false data in cooperative DC MGs with unknown CPLs, ensuring data integrity and reliable operation. In³³, the authors develop a stable and robust DC power system for more electric aircraft, addressing challenges unique to aviation applications. In³⁴, the dynamic response of dual-active-bridge converters with CPLs under extended-phase-shift control is improved, enhancing performance under varying load conditions. In³⁵, a deep learning controller is proposed for DC–DC buck–boost converters in wireless power transfer systems feeding CPLs, showcasing the integration of machine learning in power electronics control.

An improved droop control strategy is proposed in³⁶ for accurate current sharing and DC-bus voltage compensation in DC MGs, addressing common issues in conventional droop control methods. In^37,38, the authors focus on modeling and control of single-phase dual-active-bridge-based medium-voltage DC shipboard power systems, contributing to the development of reliable maritime MGs. A distributed control method is proposed in³⁹ to ensure proportional load sharing and improve voltage regulation in low-voltage DC MGs, highlighting the benefits of decentralized control architectures. In⁴⁰, voltage and frequency control of inverter-based weak low-voltage network MGs is explored, providing solutions for maintaining stability in such systems.

A decentralized control method is proposed in⁴¹ for low-voltage DC MGs, facilitating scalable and flexible MG operation. In⁴², the authors offer practical design considerations for current sharing control in parallel voltage regulator module applications, relevant to MG power distribution. A control strategy for islanded MGs with DC-link voltage control is presented in⁴³, ensuring stable operation under islanded conditions. The authors in⁴⁴ provide a general approach toward standardization in hierarchical control of droop-controlled AC and DC MGs, contributing to the harmonization of control strategies.

In⁴⁵, the authors analyze the stability of DC MGs with CPLs under distributed control methods, offering insights into maintaining stability in the presence of CPLs. Distributed control and optimization in DC MGs are discussed in⁴⁶, presenting methods to achieve optimal performance through decentralized control. A secondary control method for MGs based on distributed cooperative control of multi-agent systems is proposed in⁴⁷, facilitating coordinated control actions among distributed energy resources. In⁴⁸, the authors conduct a small-signal analysis of MG secondary control, considering communication time delays and addressing challenges related to information exchange in control systems. In⁴⁹, a novel decentralized primary and distributed secondary control strategy for DC MGs with CPLs is proposed, providing a comprehensive approach to improving system resilience under the influence of CPLs. However, the stability of DC MGs feeding CPLs under multi-level distributed control remains insufficiently studied due to the complex interactions between hierarchical control systems and CPLs. This challenge leaves the detailed stability analysis of such systems an open problem for further research.

This paper investigates the stability of parallel buck converters in a DC MG supplying local CPLs, addressing their nonlinear behavior under hierarchical control for voltage stabilization and precise power sharing. A decentralized primary droop control is implemented, guided by a sliding mode controller (SMC) with an adjusted droop expression^50,51. The secondary control employs an H-infinity controller to enhance power sharing and restore voltage^52,53. A two-time-scale analysis is conducted to evaluate system stability, considering the dynamics of the converters, CPLs, and the controller. The proposed method is validated through simulations and experimental tests, confirming its effectiveness. The key contributions of this study are outlined as follows:

• 1. Development of a decentralized primary control based on SMC.

• 2. Design of a secondary H-infinity controller for precise power sharing and voltage stabilization in the DC MG.

• 3. A two-time-scale stability analysis, considering converter dynamics, CPL behavior, and hierarchical control effects.

• 4. Validation through simulations and experimental results.

The paper is organized as follows: in “Discussion and analysis of DC MG feeding a CPL” section examines a DC MG supplying a CPL. In “Primary control design for a DC microgrid with a CPL” section details the design of a primary SMC-based controller aimed at achieving power sharing between DGs. In “Secondary control strategy for a DC microgrid feeding a constant power load” section discusses the use of hybrid sliding mode H-infinity control to enhance system stability. Simulation results are presented in “Simulation results” section, with experimental findings in “Experimental validation” section. In “Conclusion” section concludes the paper.

Discussion and analysis of DC MG feeding a CPL

The dynamic interaction between the CPL and the DC MG can lead to large-signal oscillations, compromising system stability. Addressing this instability is crucial to ensure reliable and robust operation of the DC MG in the presence of a CPL. In continuous conduction mode (CCM), the input impedance behaves as a negative resistance when the frequency is below the voltage loop cut-off frequency of the DC MG. However, when the frequency exceeds the cut-off frequency, the input impedance transitions to behave like an inductance¹⁵.

The consumed power for a CPL is constant throughout the controller bandwidth, and its relationship is provided by:

$$P_{cpl} = v_{dc\_Bus} \cdot i_{dc\_Bus} = Cte$$

(1)

where P_cpl is the power absorbed by the CPL, v_{dc_Bus} is the input voltage and i_{dc_Bus} stands for the consumed current.

Deriving the current of the CPL with respect to its voltage and inverting the result yields to the expression of the incremental negative impedance of a CPL, as follows:

$$\frac{{dv_{dc\_bus} }}{{di_{dc\_bus} }} = - \frac{{v_{dc\_bus} }}{{i_{dc\_bus} }} = - \frac{{P_{cpl} }}{{i_{dc\_bus}^{2} }} = - \frac{{v_{dc\_bus}^{2} }}{{i_{dc\_bus} }}$$

(2)

Thus

$$\frac{{dv_{dc\_bus} }}{{di_{dc\_bus} }} = - R_{cpl}$$

(3)

The INI characteristic of the CPL, highlighted in Eq. (3) and depicted in Fig. 2, introduces a − 180° phase lag in the Bode diagram, as shown in Fig. 3. From a control systems perspective, this phase lag causes instability when the output impedance of the source DC MG intersects with the input impedance of the CPL, especially when the cut-off frequency of the source DC MG is lower than that of the CPL. This instability impacts overall system performance and degrades power quality¹⁵.

Fig. 2

Incremental negative-impedance behavior of a CPL.

Fig. 3

Bode diagram behaviour of a DC MG feeding a CPL (v_{in_1,2} = 28 V, C_1,2 = 1000 µF, L_o1 = 6 mH, L_o2 = 2.7 mH, P_cpl = 10:10:100 W, d = 0.5, R_{Line_1} = 1 Ω, R_{Line_2} = 2 Ω).

External variations, such as changes in power load demand and input voltage, can significantly impact system performance, particularly settling time and overshoot. To analyse these effects, a Bode analysis is performed on an open-loop DC MG feeding a CPL, where the power load demand is changed 10 times, incrementally increasing from 10 to 100 W. The results show that such variations reduce the system’s cut-off frequency and quality factor, leading to increased overshoot and a slower transient response. Based on this example analysis, a more comprehensive control strategy is required to manage power sharing and voltage regulation effectively in a DC MG with CPLs.

To manage power sharing and voltage regulation in a DC MG with CPLs, a two-level control strategy is employed. The primary control, often using droop control, balances power distribution among DG units but may lead to voltage deviations. To address these deviations, a secondary control level is added to enhance stability and performance, as shown in Fig. 4. The proposed approach is based on a two-time-scale stability analysis, where the settling time of the primary control is designed to be faster than that of the secondary control. This hierarchical structure ensures that the primary control layer is responsible for fast stabilization, local regulation of voltage and current, and balancing power among the DGs. Once the primary control achieves stability, the secondary control, operating on a slower time scale, performs higher-level tasks such as restoring the nominal DC bus voltage, achieving system-wide balance, and ensuring proper power sharing. This separation of time scales minimizes dynamic interactions between the control layers, enhancing the overall stability and robustness of the DC MG.

Fig. 4

Parallel configuration of DC–DC converters supplying CPLs.

This coordinated control approach is particularly crucial for addressing the challenges posed by CPLs. The behavior of CPLs introduces instability-induced INI, which destabilizes the system by causing oscillations in the LC filters.

Traditional controllers designed for resistive loads struggle with the complexities introduced by CPLs, necessitating advanced control techniques. To address this, control loops (current and voltage) using an SMC are implemented for dynamic power sharing and voltage regulation in each DC–DC converter forming the MG. A secondary controller, featuring a PI controller enhanced by an H-infinity controller, is then developed to efficiently correct voltage deviations caused by the primary control and improve system stability^{50,51,52,53,54,55}.

Primary control design for a DC microgrid with a CPL

Design of the inner loops (current–voltage) based on SMC

This section introduces a nonlinear control strategy to address instability and enhance the performance of the inner loops in each DC–DC converter forming the MG. To achieve this, a robust SMC is applied to the inner current–voltage control loops. Figure 5 illustrates the setup, featuring a DC MG supplying a CPL.

Fig. 5

Primary control using SMC in a DC MG feeding a CPL.

The state-space model for a DG unit powering a CPL is derived and represented as:

$$\left\{ {\begin{array}{*{20}l} {\frac{{di_{L\_i} }}{dt} = \frac{1}{{L_{i} }}\left( {v_{in\_i} d_{i} - v_{o\_i} } \right)} \hfill \\ {\frac{{dv_{o\_i} }}{dt} = \frac{1}{{C_{i} }}\left( {i_{L\_i} - \frac{{P_{cpl\_i} }}{{v_{o\_i} }}} \right)} \hfill \\ \end{array} } \right.$$

(4)

where $v_{in\_i}$ is the input voltage of the DG unit; $v_{o\_i}$ represents the output voltage of the DG unit; $L_{i} ,C_{i}$ are the parameters value of the LC filter of the DG unit; $i_{L\_i}$ represents the inductor current of the DG unit; $P_{cpl}$ is the CPL value.

A transformation method is used to reduce the number of state variables by selecting the output voltage and its derivative as the state variables x_{1_i} and x_{2_i} for each DG unit.

Substituting x_{1_i} and x_{2_i} into Eq. (4) provides an updated expression for each DG unit supplying a CPL. This transformation simplifies the control process, enhancing model clarity and control efficiency, as shown below:

$$\left\{ {\begin{array}{*{20}l} {\dot{x}_{1\_i} = x_{2\_i} } \hfill \\ {\dot{x}_{2\_i} = \frac{{v_{in\_i} }}{{C_{i} L_{i} }}d_{i} - \frac{{x_{1\_i} }}{{C_{i} L_{i} }} - \frac{{P_{cpl} x_{2\_i} }}{{C_{i} x_{1\_i}^{2} }}} \hfill \\ \end{array} } \right.$$

(5)

where $x_{1\_i}$ represents $v_{o\_i}$, and $x_{2\_i}$ represents $\dot{v}_{o\_i}$.

In typical DC MG systems, the primary control level employs voltage and current controllers based on PI control. This section proposes an alternative approach that combines inner current–voltage loops into a unified control framework using SMC.

The SMC ensures that the output voltage of each DG unit in the DC MG accurately tracks the reference value, maintaining stable operation when connected to a CPL and improving robustness against disturbances^50,51,55. Additionally, this method offers simplicity and ease of implementation, making it well-suited for control applications.

Therefore, we define the nonlinear switching surface function $S_{i}$ as

$$S_{i} \left( {x_{i} ;t} \right) = \left( {\frac{d}{dt} + \lambda_{i} } \right)^{n - 1} \tilde{x}_{i}$$

(6)

where $\lambda_{i}$ is a positive constant weight coefficient to adjust the convergence speed; $\tilde{x}_{i}$ is the tracking error of each DG units representing the DC MG. nth-order $S_{i}$ function.

By setting n = 1 and based on the dynamic model Eq. (5), the tracking error is defined as:

$$\left\{ {\begin{array}{*{20}l} {\tilde{x}_{i} = x_{1\_i} - v_{ref\_i} } \hfill \\ {\dot{\tilde{x}}_{i} = x_{2\_i} - \dot{v}_{ref\_i} } \hfill \\ \end{array} } \right.$$

(7)

where $x_{1\_i}$ and $x_{2\_i}$ represent the output voltage of each DG unit of the DC MG, and its derivative, respectively.

By substituting Eqs. (4) and (7) into Eq. (6), it can be expressed as:

$$S_{i} = \left( {x_{2\_i} - \dot{v}_{ref\_i} } \right) + \lambda_{i} \left( {x_{1\_i} - v_{ref\_i} } \right)$$

(8)

To derive the control law u(t) for the SMC, the switching control law is expressed as:

$$u_{sw\_i} = \dot{S}_{i} = - k_{i} sign(S) - q_{i} S_{i} = \left\{ {\begin{array}{*{20}l} {\dot{S}_{i} > 0\_if\_S_{i} < 0} \hfill \\ {\dot{S}_{i} < 0\_if\_S_{i} > 0} \hfill \\ \end{array} } \right.$$

(9)

where $k_{i}$ and $q_{i}$ are positive constant coefficients.

Let us suppose the candidate Lyapunov function as:

$$V_{i} \left( {S_{i} } \right) = \frac{1}{2}S_{i}^{2}$$

(10)

Thus, based on Eqs. (9), (10), and (5), the derivative of the Lyapunov function must be negative when $S \ne 0$.

The time derivative of $V_{i}$ is given as:

$$\dot{V}_{i} \left( {S_{i} } \right) = S_{i} \cdot \dot{S}_{i} < 0$$

(11)

To validate Eq. (9), the time derivative of Eq. (6) for each DG unit is given as:

$$\dot{S}_{i} = \left( {\dot{x}_{2\_i} - \ddot{v}_{ref\_i} } \right) + \lambda_{i} \left( {\dot{x}_{1\_i} - \dot{v}_{ref\_i} } \right)$$

(12)

By using Eq. (5), Eq. (12) becomes as follows:

$$\dot{S}_{i} = \frac{{v_{in\_i} }}{{C_{i} L_{i} }}d_{i} - \frac{{x_{1\_i} }}{{C_{i} L_{i} }} - \frac{{P_{cpl} x_{2\_i} }}{{C_{i} x_{1\_i}^{2} }} - \ddot{v}_{ref\_i} + \lambda_{i} x_{2\_i} - \lambda_{i} \dot{v}_{ref\_i}$$

(13)

To ensure stability, Eq. (11) is satisfied using Eqs. (5) and (9), verified by substituting Eq. (9) into Eq. (13). Therefore, two conditions are obtained as:

• 1. If $S_{i} > 0$ should be $S_{i} < 0$. Then, the control law equal to 1, which can be written as

  $$\dot{S}_{i} = \frac{{v_{in\_i} }}{{C_{i} L_{i} }}d_{i} - \frac{{x_{1\_i} }}{{C_{i} L_{i} }} - \frac{{P_{cpl} x_{2\_i} }}{{C_{i} x_{1\_i}^{2} }} - \ddot{v}_{ref\_i} + \lambda_{i} x_{2\_i} - \lambda_{i} \dot{v}_{ref\_i} < 0$$

  (14)

• 2. If $S_{i} < 0$ should be $S_{i} > 0$. Then, the control law equal to 0, which can be written as

  $$\dot{S}_{i} = \frac{{v_{in\_i} }}{{C_{i} L_{i} }}d_{i} - \frac{{x_{1\_i} }}{{C_{i} L_{i} }} - \frac{{P_{cpl} x_{2\_i} }}{{C_{i} x_{1\_i}^{2} }} - \ddot{v}_{ref\_i} + \lambda_{i} x_{2\_i} - \lambda_{i} \dot{v}_{ref\_i} > 0$$

  (15)

To validate Eq. (11), the initial derivative of the Lyapunov candidate function for each DG unit in the DC MG is computed as:

$$\dot{V}_{i} = S_{i} \cdot \dot{S}_{i} = S_{i} \cdot \left( {\frac{{v_{in\_i} }}{{C_{i} L_{i} }}d_{i} - \frac{{x_{1\_i} }}{{C_{i} L_{i} }} - \frac{{P_{cpl} x_{2\_i} }}{{C_{i} x_{1\_i}^{2} }} - \ddot{v}_{ref\_i} + \lambda_{i} x_{2\_i} - \lambda_{i} \dot{v}_{ref\_i} } \right)$$

(16)

In DC–DC converters forming the DC MG, the control variable is the duty cycle. Thus, based on Eqs. (9) and (13), the control input d (i.e., u = d) is given as:

$$d_{i} = u_{i} = \frac{{C_{i} L_{i} }}{{v_{in\_i} }}\left( {\frac{{x_{1\_i} }}{{C_{i} L_{i} }} + \frac{{P_{cpl} x_{2\_i} }}{{Cx_{1\_i}^{2} }} + \ddot{v}_{ref\_i} - \lambda_{i} x_{2\_i} + \lambda_{i} \dot{v}_{ref\_i} } \right) + \frac{{C_{i} L_{i} }}{{v_{in\_i} }}\left( {k_{i} sign\left( {S_{i} } \right) + q_{i} S_{i} } \right)$$

(17)

The equivalent control law is given by:

$$u_{eq\_i} = \frac{{C_{i} L_{i} }}{{v_{in\_i} }}\left( {\frac{{x_{1\_i} }}{{C_{i} L_{i} }} + \frac{{P_{cpl} x_{2\_i} }}{{Cx_{1\_i}^{2} }} + \ddot{v}_{ref\_i} - \lambda_{i} x_{2\_i} + \lambda_{i} \dot{v}_{ref\_i} } \right)$$

(18)

The discontinued control law is defined as:

$$u_{dis\_i} = \frac{{C_{i} L_{i} }}{{v_{in\_i} }}\left( {k_{i} sign\left( {S_{i} } \right) + q_{i} S_{i} } \right)$$

(19)

Substituting Eq. (17) into Eq. (16) yields:

$$\dot{V}_{i} = S_{i} \cdot \dot{S}_{i} = - S_{i} \left( {ksign\left( {S_{i} } \right) + qS_{i} } \right)$$

(20)

This denotes

$$\dot{V}_{i} < - S_{i} \left( {ksign(S_{i} ) + qS_{i} } \right) < 0$$

(21)

Thus, the mathematical results confirm that the Lyapunov condition has been satisfied.

Report of conventional droop control

In DC MGs, droop control is a primary strategy for distributing loads among parallel DC–DC converters. It manages current circulation and ensures dynamic power sharing, especially in islanded MG setups^44,54. This method autonomously balances power distribution among DC–DC converters by using virtual resistive impedance, eliminating the need for data exchange between DG units.

Figure 5 illustrates the conventional droop control method with two parallel DC–DC converters, detailing the configuration as follows:

$$v_{{o\_\left( {i,j} \right)}} = v_{{o\_\left( {i,j} \right)}}^{*} - \left( {R_{{D\_\left( {i,j} \right)}} + R_{{line\_\left( {i,j} \right)}} } \right)i_{{o\_\left( {i,j} \right)}}$$

(22)

where $v_{o\_(i,j)}$ represents the output voltage of each converter; $v_{o\_(i,j)}^{*}$ is voltage reference value of the DC bus for the DC MG; $R_{D\_(i,j)}$ indicates the droop coefficient value of each converter; $R_{line\_(i,j)}$ represents the value of resistive line for each converter.

The output current of each DC–DC converter is determined by its virtual resistive value, as explained below:

$$\frac{{i_{o\_i} }}{{i_{o\_j} }} = \frac{{R_{D\_j} + R_{line\_j} }}{{R_{D\_i} + R_{line\_i} }} \approx \frac{{R_{D\_j} }}{{R_{D\_i} }} = \eta_{i,j}$$

(23)

where $\eta_{i,j}$ is the ratio of the rated capacity between the i-th converter and the j-th converter.

From Eq. (23), Eq. (22) can be expressed as:

$$v_{{o\_\left( {i,j} \right)}} = v_{{o\_\left( {i,j} \right)}}^{*} - R_{{D\_\left( {i,j} \right)}} i_{{o\_\left( {i,j} \right)}}$$

(24)

Assuming that $\xi_{v\_i}$ is the maximum allowed voltage deviation, $R_{D\_i}$ and $v_{o\_i}^{*}$ must be designed as follows:

$$v_{o\_i}^{*} = v_{o\_i} - {{\xi_{v\_i} } \mathord{\left/ {\vphantom {{\xi_{v\_i} } 2}} \right. \kern-0pt} 2}$$

(25)

$$R_{D\_i} = {{\xi_{v\_i} } \mathord{\left/ {\vphantom {{\xi_{v\_i} } {i_{o\_i\_\max } }}} \right. \kern-0pt} {i_{o\_i\_\max } }}$$

(26)

The droop control method causes voltage deviations at both the output of each DC–DC converter and the DC bus, which require correction according to the following expression:

$$\Delta v_{{o\_\left( {i,j} \right)}} = v_{{o\_\left( {i,j} \right)}}^{*} - \left( {R_{{D\_\left( {i,j} \right)}} + R_{{line\_\left( {i,j} \right)}} } \right)i_{{o\_\left( {i,j} \right)}}$$

(27)

The novel secondary control corrects voltage deviations and improves current sharing, enhancing the efficiency and reliability of the DC MG.

Secondary control strategy for a DC microgrid feeding a constant power load

This section proposes an H-infinity-based control method to enhance the secondary control of a DC MG supplying a CPL. The primary objectives are to correct DC bus voltage deviations caused by the primary control, develop a new model for the DC MG with a CPL, and ensure system stability despite disturbances from the CPL load and input voltage^52,53. The secondary control mechanism is shown in Fig. 6. The main contributions of this section are as follows:

• 1. Development of a robust H-infinity secondary control to correct voltage deviations from the primary control.

• 2. Introduction of a new DC MG model incorporating a CPL for effective secondary control application.

• 3. Assurance of system stability in the presence of CPL loads and external disturbances.

Fig. 6

Secondary control diagram for a DC MG with a CPL. Where $G_{SMC} (s)$ is a robust sliding mode controller intended for the inner loops (current, voltage) of the primary control. $PI_{\infty } (s)$ is a robust H infinity controller intended for secondary control. $G_{PWM} (s)$ is a PWM transfer function.

The derivative of the error reported for $PI_{\infty } (s)$ is written as:

$$\dot{e} = Z\left( {k_{p\infty } \cdot \dot{e} + k_{i\infty } } \right)$$

(28)

where

$$Z = - \left( {f \cdot \left| {R_{cpl} } \right| \cdot 1_{n \times 1} \cdot 1_{n \times 1}^{T} \cdot \hat{A}^{ - 1} + \beta \cdot L} \right)$$

(29)

and

$$\hat{A} = Z_{Line} + R_{D} + \left| {R_{cpl} } \right| \cdot 1_{n \times 1} \cdot 1_{n \times 1}^{T}$$

(30)

$$f = diag\left( {\left[ {f_{1} } \quad \ldots \quad {f_{i} } \quad {0_{(i + 1) \times {\mathrm{n}}} }\right]} \right),\quad {\text{i}} = 1, \ldots ,n - 1$$

(31)

$$\beta = diag\left( {\beta_{1} , \ldots ,\beta_{i} , \ldots ,\beta_{n} } \right),\quad i = 1, \ldots ,n$$

(32)

$$R_{D} = diag\left( {R_{D\_1} , \ldots ,R_{D\_i} , \ldots ,R_{D\_n} } \right),\quad i = 1, \ldots ,n$$

(33)

$$s_{i} = s_{j} ,\quad \forall j,i$$

(34)

$$Z_{Line} = diag\left( {Z_{Line(1)} , \ldots ,Z_{Line(i)} , \ldots ,Z_{Line(n)} } \right),\quad {\text{i}} = 1, \ldots ,{\text{n}}$$

(35)

The diagonal matrix gains $f$ and $\beta$ are carefully chosen to ensure that the matrix Z satisfies the Hurwitz condition; $Z_{Line}$ is a line impedance diagonal matrix; $R_{D}$ is a diagonal droop resistance gain matrix; $L$ denotes a Laplacian matrix; $R_{cpl}$ denotes INI characteristic of the CPL.

System modeling

To begin, the relationship between the output voltage of the DG unit and the DC bus voltage must be defined. This relationship is critical for constructing the DC MG model at the primary control level. Figure 7 illustrates a representative circuit of a DC MG supplying a CPL, with multiple DC sources operating simultaneously.

Fig. 7

Electrical interconnection of parallel-connected DGs supplying a CPL.

The DC bus voltage $v_{b}$ for a DC MG supplying a CPL is expressed as:

$$v_{b} = v_{o\_i} - Z_{Line(i)} \cdot i_{o\_i}$$

(36)

The generated current of each DG unit is stated below using the superposition theorem:

$$i_{o\_i} = I_{{DG_{i} }} - \sum\limits_{j = 1}^{n} {I_{{DG_{j} }} } ,\;\left\{ {i = j,{\text{I}}_{{DG_{j} }} = 0} \right\}$$

(37)

where $1 \le i \le n$, $1 \le j \le n$; n is the number of DG units used to make the DC MG. $I_{DGi}$ denotes the current supplied by the ith DG unit.

According to Eq. (37), $I_{DGi}$ and $I_{DGj}$ are given as follows:

$$I_{{DG_{i} }} = \frac{{v_{o\_i} }}{{Z_{Line(i)} + \left( {\sum\nolimits_{j = 1}^{n} {\frac{1}{{Z_{Line(j)} }} + \frac{1}{{\left| {R_{cpl} } \right|}} - \frac{1}{{Z_{Line(i)} }}} } \right)^{ - 1} }}$$

(38)

$$I_{{DG_{j} }} = v_{j} \cdot \frac{{\left( {\sum\nolimits_{T = 1}^{n} {\frac{1}{{Z_{Line(T)} }} + \frac{1}{{\left| {R_{cpl} } \right|}} - \frac{1}{{Z_{Line(j)} }}} } \right)^{ - 1} }}{{Z_{{Line_{j} }} + \left( {\sum\nolimits_{T = 1}^{n} {\frac{1}{{Z_{Line(T)} }} + \frac{1}{{\left| {R_{cpl} } \right|}} - \frac{1}{{Z_{Line(j)} }}} } \right)^{ - 1} }} \cdot \frac{1}{{Z_{Line(i)} }}$$

(39)

Assume the DG units have the same line impedance, it follows that $Z_{Line(1)} = \cdots = Z_{Line(i)} =$ $Z_{Line(j)} = \cdots = Z_{Line(n)} = Z_{Line} = \frac{1}{Y}$. In the primary control of a DC MG supplying a CPL, it is assumed that $v_{o\_1} = v_{o\_i} = v_{o\_j} = \cdots = v_{o\_n}$.

Based on the previous assumptions, substituting Eq. (37) into Eq. (36) yields the DC bus voltage. v_b as follows:

$$v_{b} = \left( {1 - \frac{{\left( {\left( {n - 1} \right) \cdot Y + \frac{1}{{\left| {R_{cpl} } \right|}}} \right) \cdot Z_{Line} - \left( {n - 1} \right)}}{{\left( {\left( {n - 1} \right) \cdot Y + \frac{1}{{\left| {R_{cpl} } \right|}}} \right) \cdot Z_{Line}^{2} + Z_{Line} }} \cdot Z_{Line} } \right) \cdot v_{o\_i}$$

(40)

As a result, using Fig. 6, the output voltage of each DC converter forming the DC MG can be expressed as:

$$v_{o\_i} = G_{SMC\_i} \cdot v_{ref\_i}$$

(41)

where

$$v_{ref\_i} = v_{o\_i}^{*} - R_{D\_i} \cdot i_{o\_i}$$

(42)

$v_{o\_i}^{*}$ represents the nominal output voltage of the DC converter.

By substituting Eq. (41) into Eq. (40), the DC bus voltage can be rewritten as:

$$v_{b} = \left( {1 - \frac{{\left( {\left( {n - 1} \right) \cdot Y + \frac{1}{{\left| {R_{cpl} } \right|}}} \right) \cdot Z_{Line} - \left( {n - 1} \right)}}{{\left( {\left( {n - 1} \right) \cdot Y + \frac{1}{{\left| {R_{cpl} } \right|}}} \right) \cdot Z_{Line}^{2} + Z_{Line} }} \cdot Z_{Line} } \right) \cdot G_{SMC\_i} .v_{ref\_i}$$

(43)

Substituting Eq. (17) into Eq. (5), the inner loop $G_{SMC\_i}$ of the ith DG unit can be expressed as:

$$\left\{ {\begin{array}{*{20}l} {\dot{x}_{1\_i} = x_{2\_i} } \hfill \\ {\dot{x}_{2\_i} = \left( {q_{i} - \lambda_{i} } \right)x_{2\_i} + \lambda_{i} q_{i} x_{1\_i} + \ddot{v}_{ref} + \left( {\lambda_{i} - q_{i} } \right)\dot{v}_{ref} - \lambda_{i} q_{i} v_{ref} + {\mathrm{k}}\,{\text{sgn}} \left( {{\text{S}}_{i} } \right)} \hfill \\ \end{array} } \right.$$

(44)

The system in Eq. (41) is linearized using the Jacobian matrix to approximate its behavior near a specific operating point. This linearization simplifies the nonlinear dynamics of Eq. (41), enabling easier analysis and control design for the secondary control. It allows the use of linear control techniques to assess stability, analyze disturbance responses, and achieve desired performance, such as voltage stabilization and power sharing in the DC MG.

$$\dot{X} = A\cdot X + B\cdot u$$

(45)

where $X$ represents the vector $\left[ {x_{1} \left. {x_{2} } \right]^{T} } \right.$; $\dot{X}$ denotes the vector $\left[ {\dot{x}_{1} \left. {\dot{x}_{2} } \right]^{T} } \right.$, and $u = v_{ref}$.

The matrices A and B are derived from Eq. (44) using the Jacobian approach, as shown below:

$$A = \left[ {\begin{array}{*{20}c} 0 & {\quad 1} \\ {\lambda_{i} q_{i} } & {\quad \left( {q_{i} - \lambda_{i} } \right)} \\ \end{array} } \right]$$

(46)

$$B = \left[ {\begin{array}{*{20}c} \begin{gathered} 0 \hfill \\ - \lambda_{i} \hfill \\ \end{gathered} & \begin{gathered} \quad 0 \hfill \\ \quad \left( {\lambda_{i} - q_{i} } \right) \hfill \\ \end{gathered} & \begin{gathered} \quad 0 \hfill \\ \quad 1 \hfill \\ \end{gathered} \\ \end{array} } \right]$$

(47)

Using matrices from Eqs. (46) and (47), the transfer function of the system can be derived as:

$$G_{SMC\_i} = C\left( {SI - A} \right)^{ - 1} \cdot B = \frac{s}{{s^{2} - \left( {q_{i} - \lambda_{i} } \right)s + \lambda_{i} q_{i} }}$$

(48)

The DC bus voltage transfer function can be expressed by substituting Eq. (48) into Eq. (43), resulting in:

$$v_{b} = \frac{{\theta \cdot Z_{Line} - \left( {n - 1} \right)}}{{Z_{Line} \left( {\theta \cdot Z_{Line} + 1} \right)}} \cdot G_{SMC\_i} \cdot v_{ref\_i}$$

(49)

where $\theta$ defined as $\left( {n - 1} \right)Y + \frac{1}{{\left| {R_{cpl} } \right|}}$.

The uniform mathematical formulation of secondary control across all DG units indicates a consistent control strategy throughout the system. Variations in line impedance among DG units introduce uncertainties, which can affect the performance and stability of the system. This uncertainty in the values of $Z_{Line}$ and $Y$ can lead to variations in power sharing and voltage stabilization in the DC MG. It is essential to account for these variations in the control strategy to ensure the system remains stable and responsive to external disturbances. By modeling and representing this uncertainty, more robust control techniques can be designed to minimize its impact and ensure reliable operation of the DC MG, even under varying conditions.

$$Z_{Line} = Z_{Line0} + \delta_{{Z_{Line} }} Z_{Line0}$$

(50)

$$Y = Y_{0} + \delta_{Y} Y_{0}$$

(51)

By substituting Eqs. (50) and (51) into Eq. (43) and performing the required mathematical operations, the expression for the DC bus voltage v_b can be derived as:

$$v_{b} = G_{SMC\_i} (s)B_{1} (s)\left( {v_{ref\_i} + w_{b} } \right)$$

(52)

where

$$B_{1} (s) = \frac{{Y_{0} Z_{Line0} (n - 1) + 1}}{{nY_{0} Z_{Line0} + \frac{{Z_{Line0} }}{{\left| {R_{cpl} } \right|}} + 1}}$$

(53)

$w_{b}$ represents the parameter that accounts for disturbances caused by transmission impedance uncertainty, and it is expressed as:

$$w_{b} = \Delta (s)\left( {\begin{array}{*{20}c} {v_{ref\_i} } \\ {v_{b} } \\ \end{array} } \right) = \frac{1}{{B_{1} (s)}}\left({\phi_{1} } \quad {\phi_{2} } \right)\left( {\begin{array}{*{20}c} {v_{ref\_i} } \\ {v_{b} } \\ \end{array} } \right)$$

(54)

where

$$\phi_{1} = G_{SMC\_i} (s)(n - 1)\frac{{\delta_{{Z_{Line} }} Z_{Line0} Y_{0} + \delta_{Y} Z_{Line0} Y_{0} }}{{nY_{0} Z_{Line0} + \frac{{Z_{Line0} }}{{\left| {R_{cpl} } \right|}} + 1}}$$

(55)

$$\phi_{2} = \frac{{\delta_{{Z_{Line} }} \left( {nY_{0} Z_{Line0} + \frac{{Z_{Line0} }}{{\left| {R_{cpl} } \right|}}} \right) + \delta_{Y} Y_{0} Z_{Line0} }}{{nY_{0} Z_{Line0} + \frac{{Z_{Line0} }}{{\left| {R_{cpl} } \right|}} + 1}}$$

(56)

Secondary control level control design process for a DC MG feeding a CPL

This study focuses on designing the secondary control process using an H-infinity approach based on a Nonsmooth Optimization Algorithm (NOA), as referenced in⁵². The methodology incorporates an augmented system that captures the mathematical relationships between the signals to be mitigated and the target signals, such as the control variable and error. This augmented system also includes weight functions, which play a crucial role in formulating the secondary control by defining the desired performance criteria. The secondary control block diagram in Fig. 8 illustrates the developed system and highlights the significance of weight functions in the design phase. The weight functions $W_{S1} (s)$, $W_{S2} (s)$ and $W_{S3} (s)$ are used to create the secondary controller of the DC MG feeding a CPL (see Fig. 9).

Fig. 8

Robust secondary control in a closed-loop system.

Fig. 9

Robust secondary control using weight functions.

The augmented plant $P(s)$ required for the design process, as depicted in Fig. 9, is represented by the following expression:

$$\left( \begin{gathered} e_{1} \hfill \\ e_{2} \hfill \\ y_{s} \hfill \\ \end{gathered} \right) = P(s)\left[ {\begin{array}{*{20}c} {V^{*} } \\ {W^{*} } \\ {s_{i} } \\ \end{array} } \right] = \left[ {\begin{array}{*{20}c} {W_{S1} (s)f_{i} } & {\quad - W_{S1} (s)G_{SMC} (s)B_{1} (s)f_{i} W_{S3} (s)} & {\quad - W_{S1} (s)} \\ 0 & {\quad 0} & {\quad W_{S2} (s)} \\ 1 & {\quad - G_{SMC} (s)B_{1} (s)W_{S3} (s)} & {\quad G_{SMC} (s)B_{1} (s)} \\ \end{array} } \right]\left[ {\begin{array}{*{20}c} {V^{*} } \\ {W^{*} } \\ {s_{i} } \\ \end{array} } \right]$$

(57)

During steady-state operation, all decentralized secondary controllers generate identical compensation voltage signals, such that $\left( {s_{1} = s_{2} , \ldots ,s_{i} , \ldots ,s_{n} } \right)$.

Therefore, $s_{i}$ can be approximately expressed as:

$$s_{i} = PI_{\infty } (s)y(s)$$

(58)

The linear fractional transformation (LFT) of the system is defined as follows:

$$y = F_{L} \left( {P(s),PI_{\infty } (s)} \right) \cdot y_{in}$$

(59)

where

$$F_{L} \left( {P(s),PI_{\infty } (s)} \right) = \left( {\begin{array}{*{20}c} {W_{S1} (s)S_{S} (s)} & {\quad W_{S1} (s)S_{S} (s)G_{SMC} (s)B_{1} (s)W_{S3} (s)} \\ {W_{S2} (s)S_{S} (s)PI_{\infty } (s)} & {\quad - W_{S2} (s)\varpi_{s} (s)W_{S3} (s)} \\ \end{array} } \right)$$

(60)

where $y$ and $y_{in}$ are written as follows: $y_{in} = \left( {\begin{array}{*{20}c} {V^{*} } \\ {W^{*} } \\ \end{array} } \right),y = \left( {\begin{array}{*{20}c} {e_{1} } \\ {e_{2} } \\ \end{array} } \right)$.

The sensitivity functions, denoted as $S_{S} (s)$ and $\varpi_{s}$, can be expressed as follows:

$$S_{S} (s) = \frac{1}{{1 + PI_{\infty } (s)G_{SMC} (s)B_{1} (s)}}$$

(61)

$$\varpi (s) = \frac{{PI_{\infty } (s)G_{SMC} (s)B_{1} (s)}}{{1 + PI_{\infty } (s)G_{SMC} (s)B_{1} (s)}}$$

(62)

To ensure that the designed controller $PI_{\infty } (s)$ meets the control objectives, it must satisfy the following condition:

$$\left\| {F_{L} (P(s),PI_{\infty } (s))} \right\|_{\infty } \le \gamma$$

(63)

The design must meet Eq. (63) and select suitable weight functions for stability. To validate this condition, it is recommended to examine the norm of the H_infinty of the gains within the transfer matrix $\left\| {F_{L} (P(s),PI_{\infty } (s))} \right\|_{\infty }$, ensuring these values remain below a specified boundary $\gamma$. This approach ensures a robust design, confirming the effectiveness and reliability of the introducing controller in achieving the optimal control objectives. This leads to:

$$\left\{ {\begin{array}{*{20}l} {\left\| {S_{S} (s)} \right\|_{\infty } \le \frac{\gamma }{{\left\| {W_{S1} (s)} \right\|_{\infty } }} \to \left\| {S_{S} (s)} \right\|_{\infty } \le \frac{\gamma }{{\left| {W_{S1} (s)} \right|}}} \hfill \\ {\left\| {S_{S} (s)G_{SMC} (s)B_{1} (s)} \right\|_{\infty } \le \frac{\gamma }{{\left\| {W_{S1} (s)W_{S3} (s)} \right\|_{\infty } }} \to \left\| {S_{S} (s)G_{SMC} (s)B_{1} (s)} \right\|_{\infty } \le \frac{\gamma }{{\left| {W_{S1} (s)W_{S3} (s)} \right|}}} \hfill \\ {\left\| {S_{S} (s)PI_{\infty } (s)} \right\|_{\infty } \le \frac{\gamma }{{\left\| {W_{S2} (s)} \right\|_{\infty } }} \to \left\| {S_{S} (s)PI_{\infty } (s)} \right\|_{\infty } \le \frac{\gamma }{{\left| {W_{S2} (s)} \right|}}} \hfill \\ {\left\| {\varpi_{s} (s)} \right\|_{\infty } \le \frac{\gamma }{{\left\| {W_{S2} (s)W_{S3} (s)} \right\|_{\infty } }} \to \left\| {\varpi_{s} (s)} \right\|_{\infty } \le \frac{\gamma }{{\left| {W_{S2} (s)W_{S3} (s)} \right|}}} \hfill \\ \end{array} } \right.$$

(64)

The mathematical expressions of these weight functions are expressed as:

$$\left\{ {\begin{array}{*{20}l} {W_{S1} (s) = \frac{1}{{K_{S1} }} \cdot \frac{{s + w_{cs} K_{S1} }}{{s + w_{cs} k_{s1} }}} \hfill \\ {W_{S2} (s) = \frac{1}{{k_{s2} }} \cdot \frac{{s + \frac{{w_{cs} }}{{K_{S2} }}}}{{s + \frac{{w_{cs} }}{{k_{s1} }}}}} \hfill \\ {W_{S3} (s) = K_{2}^{\prime} } \hfill \\ \end{array} } \right.$$

(65)

where

$$K_{s1} = K_{s2} = e^{{ - \frac{\log (10)}{{20}}\Delta G}}$$

(66)

and

$$k_{s1} = k_{s2} = \varepsilon$$

(67)

In addition, $K_{2}^{\prime}$ have to be chosen less then $\varepsilon$.

The parameter $w_{cs}$ represents the cutoff frequency, which plays a crucial role in shaping the dynamic response of the secondary control system. Since the primary control typically responds faster than the secondary control, $w_{cs}$ must be selected to operate at a lower frequency than the primary control. This ensures that the secondary control system can effectively complement and stabilize the primary control response, reducing the risk of instabilities or oscillations in the overall control framework.

The parameters $w_{cs}$ and $\Delta G$ are key metrics for evaluating system performance, with $w_{cs}$ representing the steady-state error and $\Delta G$ indicating the gain margin. The next section provides a detailed overview of the NOA and explains how the NOA process is applied.

Secondary control for DC microgrid using nonsmooth optimization algorithm

The NOA is used to address a specific optimization problem in secondary control design. Its main goal is to find a structured controller configuration that minimizes the H∞ norm of $F_{L} (P(s),PI_{\infty } (s))$. This optimization aims to reduce the impact of disturbances, especially those represented by $y_{in}$, and stabilize $P(s)$ within the system. By minimizing the H∞ norm, the NOA enhances the system’s ability to attenuate disturbances and maintain stability, leading to better performance and reliability in practical applications⁵². This optimization problem is formulated as follows:

$$\begin{aligned} & \mathop {Minimize}\limits_{w \in R} \left\| {F_{L} (P(s),PI_{\infty } (s))} \right\|_{\infty } \\ & subject\_to\; PI_{\infty } (s)\; stablizes\; P(s) \\ \end{aligned}$$

(68)

The variable w denotes the frequency and is defined within the real interval ${\mathbb{R}}$; The controller $PI_{\infty } (s)$ is designed with a fixed structure similar to that of a PI control configuration.

The NOA relies on the derivative of the Clarke subdifferentiable function, which is defined as follows:

Definition 1

(Clarke subdifferentiable function). Let consider two functions $f(x)$ and $G(x)$, where $f(x)$ is equal to the H∞ norm of $G(x)$. $f(x)$ can be written as follows:

$$f(x) = \left\| {G(x)} \right\|_{\infty }$$

(69)

The Clarke subdifferentiable function derived from $f(x) = \left\| {G(x)} \right\|_{\infty }$ is written as follows:

$$\delta f(x) = \wp^{\prime} (x)\cdot \min \left( {\phi \left( {\wp (x)} \right)} \right)$$

(70)

where $\wp (x)$ is the smooth operator, mapping $R^{n}$ on the space H∞ of the $G(x)$, $\wp^{\prime} (x)$ is the adjoint of $\wp (x)$ and $\phi \left( {\wp (x)} \right)$ is the subgradient $\wp (x)$ of at $G(x)$.

Definition 2

(Smooth operator). Let consider a function $G(x)$ that links the outputs vector y to the inputs vector u. This mathematical relationship between u and y is expressed as follows:

$$y = G(x)u$$

(71)

where u and y can be written as:

$$y = \left( {\begin{array}{*{20}c} {y_{1} } \\ {y_{2} } \\ : \\ : \\ {y_{n} } \\ \end{array} } \right)$$

(72)

$$u = \left( {\begin{array}{*{20}c} {u_{1} } \\ {u_{2} } \\ : \\ : \\ {u_{n} } \\ \end{array} } \right)$$

(73)

$G(x)$ can be divided into smooth operators, where each operator is a subfunction derived from $G(x)$. Linking a single input to a single output, as expressed by the following equation:

$$y_{j} = \mathop G\limits_{{u_{i} \to y_{i} }} (x) \cdot u_{i}$$

(74)

$G_{{u_{j} \to y_{j} }} (x)$ denotes the smooth operator.

Definition 3

(Smooth operator subgradient). Let’s consider a function $G(x)$, and $G_{{u_{i} \to y_{i} }} (x)$ is a smooth operator derived from $G(x)$. The subgradient of $\, G_{{u_{i} \to y_{i} }} (x)$ at $G(x)$ is given as

$$\phi \left( {\mathop G\limits_{{u_{i} \to y_{i} }} (x)} \right) = \left\| {G(x)} \right\|_{\infty }^{ - 1} {\text{Re}} \left( {Tr\left( {G(x)^{*} \underline {u} \cdot \underline {u}^{*} \mathop G\limits_{{u_{i} \to y_{i} }} (x)} \right)} \right)$$

(75)

Based on Definition 2, the smooth operators derived from $F_{L} (P(s),PI_{\infty } (s))$ are given as follows:

$$e_{1} = \mathop {F_{L} }\limits_{{V^{*} \to e_{1} }} \left( {P(s),PI_{\infty } (s)} \right) \cdot V^{*}$$

(76)

$$e_{1} = \mathop {F_{L} }\limits_{{W^{*} \to e_{1} }} \left( {P(s),PI_{\infty } (s)} \right) \cdot W^{*}$$

(77)

$$e_{2} = \mathop {F_{L} }\limits_{{V^{*} \to e_{2} }} \left( {P(s),PI_{\infty } (s)} \right) \cdot V^{*}$$

(78)

$$e_{2} = \mathop {F_{L} }\limits_{{W^{*} \to e_{2} }} \left( {P(s),PI_{\infty } (s)} \right) \cdot W^{*}$$

(79)

As per Definition 3, subgradients can be determined using the smooth operators at $F_{L} (P(s),PI_{\infty } (s))$ outlined in Eqs. (76), (77), (78), and (79). These equations can be expressed as follows after rewriting them accordingly.

$$\phi \left( {\mathop {F_{L} }\limits_{{V^{*} \to e_{1} }} \left( {P(s),PI_{\infty } (s)} \right)} \right) = \left\| {F_{L} \left( {P(s),PI_{\infty } (s)} \right)} \right\|_{\infty }^{ - 1} {\text{Re}} \left( {Tr\left( {F_{L} \left( {P(s),PI_{\infty } (s)} \right)^{*} \cdot \underline {u}_{1} \cdot \underline {u}_{1}^{*} \cdot \mathop {F_{L} }\limits_{{V^{*} \to e_{1} }} \left( {P(s),PI_{\infty } (s)} \right)} \right)} \right)$$

(80)

$$\phi \left( {\mathop {F_{L} }\limits_{{W^{*} \to e_{1} }} \left( {P(s),PI_{\infty } (s)} \right)} \right) = \left\| {F_{L} \left( {P(s),PI_{\infty } (s)} \right)} \right\|_{\infty }^{ - 1} {\text{Re}} \left( {Tr\left( {F_{L} \left( {P(s),PI_{\infty } (s)} \right)^{*} \cdot \underline {u}_{1} \cdot \underline {u}_{1}^{*} \cdot \mathop {F_{L} }\limits_{{W^{*} \to e_{1} }} \left( {P(s),PI_{\infty } (s)} \right)} \right)} \right)$$

(81)

$$\phi \left( {\mathop {F_{L} }\limits_{{V^{*} \to e_{2} }} \left( {P(s),PI_{\infty } (s)} \right)} \right) = \left\| {F_{L} \left( {P(s),PI_{\infty } (s)} \right)} \right\|_{\infty }^{ - 1} {\text{Re}} \left( {Tr\left( {F_{L} \left( {P(s),PI_{\infty } (s)} \right)^{*} \cdot \underline {u}_{1} \cdot \underline {u}_{1}^{*} \cdot \mathop {F_{L} }\limits_{{V^{*} \to e_{2} }} \left( {P(s),PI_{\infty } (s)} \right)} \right)} \right)$$

(82)

$$\phi \left( {\mathop {F_{L} }\limits_{{W^{*} \to e_{2} }} \left( {P(s),PI_{\infty } (s)} \right)} \right) = \left\| {F_{L} \left( {P(s),PI_{\infty } (s)} \right)} \right\|_{\infty }^{ - 1} {\text{Re}} \left( {Tr\left( {F_{L} \left( {P(s),PI_{\infty } (s)} \right)^{*} \cdot \underline {u}_{1} \cdot \underline {u}_{1}^{*} \cdot \mathop {F_{L} }\limits_{{W^{*} \to e_{2} }} \left( {P(s),PI_{\infty } (s)} \right)} \right)} \right)$$

(83)

According to Definition 1, Clarke subdifferentiable functions derived from Eqs. (80), (81), (82), and (83) can be expressed as follows:

$$\delta f_{1} (x) = \mathop {F_{L} }\limits_{{V^{*} \to e_{1} }} \left( {P(s),PI_{\infty } (s)} \right)^{*} \left( x \right) \cdot \mathop {\min }\limits_{w \in R} \left( {\phi \left( {\mathop {F_{L} }\limits_{{V^{*} \to e_{1} }} \left( {P(s),PI_{\infty } (s)} \right)(x)} \right)} \right)$$

(84)

$$\delta f_{1} (x) = \mathop {F_{L} }\limits_{{W^{*} \to e_{1} }} \left( {P(s),PI_{\infty } (s)} \right)^{*} \left( x \right) \cdot \mathop {\min }\limits_{w \in R} \left( {\phi \left( {\mathop {F_{L} }\limits_{{W^{*} \to e_{1} }} \left( {P(s),PI_{\infty } (s)} \right)(x)} \right)} \right)$$

(85)

$$\delta f_{1} (x) = \mathop {F_{L} }\limits_{{V^{*} \to e_{2} }} \left( {P(s),PI_{\infty } (s)} \right)^{*} \left( x \right) \cdot \mathop {\min }\limits_{w \in R} \left( {\phi \left( {\mathop {F_{L} }\limits_{{V^{*} \to e_{2} }} \left( {P(s),PI_{\infty } (s)} \right)(x)} \right)} \right)$$

(86)

$$\delta f_{1} (x) = \mathop {F_{L} }\limits_{{W^{*} \to e_{2} }} \left( {P(s),PI_{\infty } (s)} \right)^{*} \left( x \right) \cdot \mathop {\min }\limits_{w \in R} \left( {\phi \left( {\mathop {F_{L} }\limits_{{W^{*} \to e_{2} }} \left( {P(s),PI_{\infty } (s)} \right)(x)} \right)} \right)$$

(87)

The data of the controller $PI_{\infty } (s)$, represented by x, can be expressed as follows:

$$x = \left( {k_{p\infty } } \quad {k_{i\infty } } \right)$$

(88)

The NOA operates using subgradients and Clarke subdifferentiable functions. The NOA process involves the following steps.

• Step 1 start the variable x with a large initial value, denoted as $x = x^{ + }$

• Step 2 Minimize Eqs. (80) to (83) as part of solving a convex optimization problem.

• Step 3 Insert the minimal values from Eqs. (80) to (83) into Eqs. (84) to (87). If all results are non-zero, decrease x by $\Delta x\left( {x = x^{ + } - \Delta x} \right)$ (where $\Delta x = ( {\Delta k_{p} } \;\, {\frac{{\Delta k_{p} }}{\left\| d \right\|}} )$). Choose $\Delta k_{p}$ as small as possible, and let d should be the subgradients vector from Eqs. (84) to (87). Update $x^{ + }$ with the new x and go back to Step 2. If any Equation equals zero, check the condition in Eq. (64). If satisfied, stop and use the controller as the solution from Eq. (68). If the condition is met, go to Step 4 to calculate $\gamma$.

• Step 4 Update the weight functions and restart at Step 1. The process concludes when the weight functions have effectively optimized the controller.

The steps of the NOA Algorithm are illustrated in the flowchart shown in Fig. 10.

Fig. 10

Nonsmooth optimization algorithm flowchart.

Stability analysis

The stability analysis of the system under investigation necessitates the verification of the condition in Eq. (64) for varying system parameters, including DC bus voltage thresholds of $v_{b} - 40\% < v_{b} < v_{b} + 40\%$, using the singular value plot. In this context, the singular value evolutions of the sensitivity and complementary sensitivity functions are presented in Fig. 11. The system parameters employed for the stability study are provided in Table 1.

Fig. 11

Frequency response analysis based on the evolution of Eq. (64).

Table 1 DC microgrid parameters values.

Where the controller that have been used for the secondary controller is defined as follows:

$$PI_{\infty } (s) = 0.0017 \cdot \frac{1 + 1.5455 \cdot {s}}{{1.5455 \cdot {s}}}$$

(89)

According to the generated algorithm, the weight functions applied to the secondary controller are specified as follows:

$$\left\{ {\begin{array}{*{20}l} {W_{S1} (s) = \frac{0.5 \cdot {s} + 321.5}{{s + 0.3120}}} \hfill \\\\{W_{S2} (s) = \frac{{10^{3} \cdot {s} + 15.6250 \cdot 10^{4} }}{{s + 3152 \cdot 10^{6} }}} \hfill \\\\ {W_{S3} (s) = 3 \cdot 10^{ - 4} } \hfill \\ \end{array} } \right.$$

(90)

$\gamma$ is given as follows:

$$\gamma = 0.80$$

(91)

$f_{i}$ and $\beta_{i}$ are selected for each DC–DC buck converter as follows:

$$\left\{ {\begin{array}{*{20}l} {f_{i} = 1} \hfill \\ {\beta_{i} = 1} \hfill \\ \end{array} } \right.$$

(92)

As shown in Fig. 11, the condition specified in Eq. (64) is verified, indicating that the stability criteria for the proposed H∞ control design are met. This confirms the ability of the proposed control strategy to effectively attenuate all disturbances in the DC bus. The performance of the PI∞(s) control scheme is further demonstrated as follows:

Based on Fig. 9 and neglecting the influence of the weight functions in the proposed control loop, the error y $\left( {y = V^{*} - v_{b} } \right)$ and the voltage compensation signal s_i can be expressed as follows:

$$\left\{ {\begin{array}{*{20}l} {y = S_{S} (s)V^{*} + S_{S} (s)G_{SMC} (s)W^{*} } \hfill \\ {s_{i} = S_{S} (s)PI_{\infty } (s) \cdot V^{*} - \varpi_{S} (s)W^{*} } \hfill \\ \end{array} } \right.$$

(93)

Based on the obtained singular plots, the magnitude of all expressions in Eq. (64) is less than 1, where $\left( {\left| {S_{S} (s)G_{SMC} (s)} \right| \ll 1,\left| {S_{S} (s)G_{SMC} (s)} \right| \ll 1,\left| {\varpi_{S} (s) \ll 1} \right|,\left| {S_{S} (s)G_{SMC} (s)B_{1} (s)} \right| \ll 1} \right)$.

This implies that the influence of the disturbance variables $V^{*}$ and $W^{*}$ on the $y$ and $s_{i}$ is neglected. Therefore, based on Eq. (58), y depends exclusively on s_i.

Simulation results

A simulation using PSIM software was conducted to test the developed controller, modeling a DC MG as illustrated in Fig. 4, and operating under the proposed approach. This MG consists of two parallel-connected buck converters supplying a CPL. These two DC–DC converters have differing LC filter parameters. The input voltage for the converters is supplied by DC sources, serving as an equivalent model of RESs. Various scenarios were tested throughout the simulation. Due to an external disturbance in the MG, fluctuations in the load and input voltage are taken into account in this simulation. The parameters of the DC–DC buck converters are given in Table 1.

Figure 12 illustrates the performance of the DC MG with the proposed secondary controller, highlighting quick settling times (0.2 s), minimal overshoot, and accurate tracking of the output voltages, achieving a stable zero steady-state error. Furthermore, proportional load current sharing is achieved among the DGs, ensuring the restoration and stability of the DC bus voltage.

Fig. 12

Closed-loop response of the DC MG with the proposed secondary controller: (a) v_o1, (b) v_o2, (c) output currents, (d) DC bus voltage.

Case 1: activated of the proposed controller test

Initially, the stability of the DC MG with the proposed secondary controller is evaluated. Prior to t = 1.5 s, the two DGs operate in parallel, each regulating its respective output voltage. The terminal voltage is maintained at a reference value of 16 V (see to Fig. 13). Due to variations in load, the output currents of the DGs differ (see Fig. 13b). At t = 3.5 s, DG-1 and DG-2 are synchronized using primary controllers (see Fig. 13c), with the virtual impedance in the droop controls set to 5 Ω. Subsequently, the secondary controller is activated at t = 3.5 s to correct the voltage deviation caused by the primary control, which draws 10 W.

Fig. 13

Response to secondary control activation: (a) output currents, (b) output voltages, (c) DC bus voltage.

As illustrated in Fig. 13b, proportional load current sharing is achieved by automatically adjusting the DG voltages (see Fig. 13a) to their nominal values using the proposed secondary controller.

Case 2: power demand variation test

The simulation results validate the effectiveness of the proposed controller in stabilizing the DC MG system under dynamic and challenging conditions. Specifically, the controller successfully mitigates fluctuations caused by abrupt changes in the power demand of a CPL, as shown in Fig. 14. Initially, the system operates at a steady state with a power demand of 10 W. Between t = 1 s and t = 3.5 s, the CPL power demand increases rapidly to 25 W. Despite this significant demand increase, the controller ensures system stability, effectively preventing oscillations or sudden transient disturbances. A further increase in power demand to 35 W between t = 3.5 s and t = 4.5 s, with the controller once again demonstrating its robustness by promptly adjusting to the new load while maintaining stable operation. Finally, an additional sudden increase of 15 W is applied from t = 4.5 s to the end of the simulation, further complicating the power demand profile. The controller continues to stabilize the system, as evidenced by the absence of fluctuations in Fig. 14.

Fig. 14

System response to changing CPL power demand: (a) output currents, (b) output voltages, (c) DC bus voltage.

These simulation results show that the controller is strong and flexible in handling sudden large changes in power demand from the load of the DC MG. Its ability to reduce quick fluctuations and prevent instability makes it valuable for keeping DC MG systems reliable, especially in environments were power needs change randomly. This capability is vital for applications with fluctuating power demands, as it allows for consistent performance and reliable operation under a variety of scenarios.

Case 3: input voltage variation test

To thoroughly evaluate the robustness and effectiveness of the proposed secondary controller under challenging conditions, a set of tests was conducted simulating significant input voltage fluctuations. These tests involved voltage drops of up to 45%, as illustrated in Fig. 15, where the input voltage initially decreased from 32 to 17 V before returning to the nominal level. The simulation results indicate that the controller successfully maintained the output voltages of both DGs and the DC bus close to their reference values, despite the large variations in input voltage. This performance demonstrates the fast response capabilities of the controller, as it minimized the risk of overshoot or instability, a common issue during abrupt voltage changes.

Fig. 15

System response under input voltage fluctuations: (a) input voltage variation test, (b) output voltages, (c) output currents, (d) DC bus voltage.

Additionally, the secondary controller effectively balanced current sharing among the DGs, which is essential for stable and efficient MG operation. The ability to keep inductor current variations low further indicates that the controller can stabilize internal currents under non-ideal input conditions. This balanced current distribution not only helps protect the DGs from overloading but also extends their durability by ensuring a more even load distribution. Such robust control over fluctuating input voltages is crucial in practical applications where voltage conditions are not always stable, highlighting the value of the controller for reliable and consistent DC MG operation in real-world settings.

Case 4: DC bus reference variation test

This test aims to evaluate the stability and robustness of the system by introducing a step change in the DC bus reference voltage within the DC MG, as illustrated in Fig. 16. Initially, the DC bus voltage stabilizes at 16 V, reflecting a rapid response to the set reference. At t = 1.5 s, the reference voltage is increased to 19 V, and at t = 3.5 s, it reverts to the original value (see Fig. 16a). During these transitions, the system effectively adapts by adjusting the output currents of both DC–DC converters, ensuring stable power-sharing and mitigating instability (see Fig. 16b). The test results reveal that the DC bus voltage tracks the target profile accurately, showing minimal settling time, no overshoot, and a high degree of stability, even with significant step variations in the reference value. Furthermore, the proposed secondary compensation control ensures the DC bus voltage adjusts closely to the desired reference value, highlighting its effectiveness in high-performance applications (see Fig. 16d). This control approach enhances system stability, demonstrating robustness against voltage variations while maintaining balanced load sharing across the DC–DC converters. Consequently, the developed control technique proves to be robust, showing that the system can manage sudden changes in the DC bus voltage reference without compromising power distribution or operational stability.

Fig. 16

System response under reference DC bus voltage changes: (a) reference DC bus voltage variation test; (b) output voltages; (c) output currents; (d) DC bus voltage.

Case 5: DG plug-and-play

This study investigates the plug-and-play capabilities of the suggested secondary control for DG units in a DC MG, as shown in Fig. 17. The setup involves DG-2, initially integrated with the DC bus and operating under the primary and secondary controllers, which ensure a stable output voltage of 16 V. At t = 1.5 s, DG-2 is intentionally unplugged from the DC bus, creating a test scenario for the response of the suggested controller. Following the disconnection, the DC bus voltage remains steady at 16 V, suggesting the capacity of the system to maintain voltage levels in the absence of DG-2. The unplugged period continues until t = 3 s, after which DG-2 is restored to the DC bus. This reconnection promptly restores stability across the DC bus, illustrating the capability of the controller to seamlessly reintegrate DG units without causing transient disturbances. This response highlights the effectiveness of the controller in maintaining system stability and managing dynamic changes in network configuration.

Fig. 17

Response to plug and play: (a) output currents; (b) output voltages; (c) DC bus voltage.

The results, as illustrated in the accompanying Fig. 17, highlight the effectiveness of the proposed controller in regulating voltage and ensuring system stability despite the plug-and-play behavior of DG units. By eliminating voltage deviation and maintaining a steady-state condition, the controller proves to be a robust solution for ensuring power quality within dynamic and flexible distributed energy systems. This functionality is essential for MGs, where the intermittent nature of DG units and varying load demands necessitate a control strategy capable of rapid adaptation. Consequently, this study affirms the suitability of the secondary controller for applications requiring high levels of reliability and resilience, thereby supporting the integration of distributed generation in sustainable and efficient power networks.

Comparative performance assessment:

This subsection presents a comparative performance analysis of the proposed hybrid sliding mode H∞ control for primary and secondary control, compared to well-known existing methods in the literature, as shown in Table 2. From Table 2, it can be inferred that the proposed control outperforms all other algorithms, making it an effective solution for handling power sharing and voltage regulation, even under external disturbances such as input voltage variation, power load demand fluctuations, plug-and-play scenarios, and uncertainties.

Table 2 Comparison of the proposed hybrid sliding mode H∞ control with other techniques on a qualitative basis.

Experimental validation

A scaled-down laboratory prototype of a DC MG with two DGs was implemented to experimentally validate the proposed controller. The experimental setup was carried out based on the generated C code from PSIM software. In this experiment, a voltage-controlled boost converter, acting as a CPL, was supplied by two parallel buck converters, forming the DC MG. To simulate line impedance effects, resistors were placed between each output of the converters and the main DC bus, replicating real MG conditions.

The experimental setup, depicted in Fig. 18, models each DG as an ideal voltage source (VDC = 36 V) paired with a buck converter, representing the power generation units in the DC MG. The setup was built using a voltage sensor (LA25-NP, 717087) and a current sensor (LV25-P, 714227). Control algorithms for the system were implemented on a DSP28335 microcontroller, which generates pulse-width modulation (PWM) signals for both buck converters and the boost converter acting as the CPL. Data acquisition and PWM frequencies were both set at 25 kHz for synchronized control.

Fig. 18

Experiment setup.

The effectiveness of the proposed controller was tested under four scenarios:

• Test 1: Secondary control activation.

• Test 2: Power load demand variation.

• Test 3: DC bus voltage reference variation.

• Test 4: Plug and play.

This experimental setup allowed for testing voltage regulation, stability, and the robustness of the secondary control approach under dynamic conditions. It is worth noting that, despite the parameters listed in Table 1 not being identical to those used in the implementation, all experimental results demonstrated excellent tracking performance and disturbance rejection in all scenarios.

Figures 19, 20, 21, 22, 23, 24, 25, 26 and 27 illustrate the experimental results. Detailed configuration parameters, including component values and system settings, are provided in Table 3.

Fig. 19

Experimental results: time evolution of DG output voltages during secondary control activation.

Fig. 20

Experimental result: time evolution of the output currents of each DG under secondary control activation.

Fig. 21

Experimental result: time evolution of the DC bus voltage under secondary control activation.

Fig. 22

Experimental results: time evolution of the output voltages of each DG under CPL variation.

Fig. 23

Experimental results: time evolution of DG output currents during CPL variation.

Fig. 24

Experimental result: time evolution of the DC bus voltage under CPL variation.

Fig. 25

Experimental result: time evolution of the DC bus voltage response to reference value changes.

Fig. 26

Experimental results: time evolution of DG output currents during plug-and-play scenario.

Fig. 27

Experimental result: time evolution of the DC bus voltage under the scenario of plug-and-play.

Table 3 Parameters of the MG system and controller.

The parameters of the boost converter are: $v_{in\_boost} = 18\,{\text{V}}$, $v_{o\_boost} = 22\,{\text{V}}$, $C_{o\_boost} = 470\,\upmu {\text{F}}$, $L_{o\_boost}$ = 0.52 mH, $R_{L\_boost} = 33\,\Omega ,\;f_{sw\_boost} = 25\,{\text{kHz}}$.

Experimental results with the secondary control activation

In this sub-section, the proposed secondary control technique is evaluated under a scenario that includes secondary control activation. The experimental results in real time, presented in Figs. 19, 20, and 21, show the systems behavior before and after control activation. Initially, neither primary nor secondary control is active, resulting in output voltage drops for v_o1 and v_o2 to 16.5 V and 17 V, respectively, and a DC bus voltage of 17.2 V. This deviation from the reference voltage v_b = 18 V is attributed to the issue of current circulation within the system.

Upon activation of the primary control, output voltages v_o1 and v_o2 further drop to 13.4 V and 13.5 V, with the DC bus voltage decreasing to 13.4 V, creating a substantial deviation from the required reference values. However, under primary control, a balanced power-sharing ratio is achieved between DGs with a fast-settling time around of 0.2 s, although overshot is not observed. These observations emphasize the need for secondary control to maintain stable output and bus voltages while ensuring accurate power-sharing.

Upon activation of the proposed secondary control, the DC bus voltage is restored to the desired reference value with a fast response within 0.75 s, and no overshoot is noted. The control strategy effectively stabilizes voltage and maintains a consistent power-sharing ratio among the distributed generators, ensuring balanced load distribution.

The experimental evaluation demonstrates that the proposed secondary control strategy effectively stabilizes the DC bus voltage at the desired reference value and maintains a balanced power-sharing ratio between the DGs. Without any control activation, voltage deviations occur due to current circulation, leading to significant drops in both output voltages and DC bus voltage. While primary control achieves power-sharing, it does not adequately address voltage stability. The activation of secondary control successfully resolves these issues, highlighting its essential role in achieving both voltage regulation and balanced current-sharing distribution within the DC MG.

Experimental results with constant power load fluctuation

In this sub-section, we evaluate the proposed controller under conditions where the CPL fluctuates. To test the response of the system, the CPL power is varied from 10 to 20 W before returning to its nominal value. The experimental results, displayed in Figs. 22, 23, and 24, indicate that despite these fluctuations, whether the power load demand steps up or down, the DC bus voltage remains stable at v_b = 18 V.

The two DGs exhibit effective current-sharing, producing nearly equal output while maintaining stable output voltages unaffected by fluctuations. The performance conforms to the droop control method and the functionality of local controllers, demonstrating the robustness of the proposed control strategy.

The proposed control maintains DC bus voltage stability at the reference value of v_b = 18 V, rejecting all fluctuations with a good response time of around 0.7 s and negligible overshoot. The experimental results confirm that the DC bus voltage remains stable despite variations in the CPL, while the DGs efficiently share the current output and maintain stable voltages across the buck converters. This finding, consistent with the droop control design, highlights the effectiveness of the control strategy in achieving reliable voltage regulation and balanced load distribution within the system, even under dynamic operating conditions.

These results highlight the system ability to maintain voltage stability and ensure balanced load distribution among DGs, even under fluctuations in the CPL.

Experimental results with DC bus voltage reference variation

This sub-section evaluates the performance of the proposed controller under varying DC bus voltage reference conditions. The DC bus reference voltage is adjusted from 18 to 20 V and then returned to its nominal value. This scenario was used to assess the response of the DC bus under the proposed secondary control strategy with a variable reference voltage. The experimental results show that the DC bus voltage tracks the reference value with a fast-settling time of approximately 0.8 s, even when the reference voltage fluctuates.

Experimental results, displayed in Fig. 25, demonstrate that the DC bus voltage remains stable regardless of fluctuations in the reference, whether it increases or decreases.

Experimental results with plug-and-play

This sub-section examines the systems performance during the plug-and-play integration of DG-2 into the DC MG. DG-2 is sequentially disconnected and reconnected to the DC bus to assess the systems response. The experimental results, shown in Figs. 26 and 27, demonstrate that the proposed secondary control method effectively rejects fluctuations, maintaining the DC bus voltage at the reference value throughout the operation. Additionally, DG-1 adjusts its current output, nearly doubling it, to share the load almost equally in response to DG-2s disconnection.

The results confirm that the control strategy maintains DC bus voltage stability during DG-2s plug-and-play operation. Despite DG-2s disconnection and reconnection, the control method eliminates fluctuations, ensuring the DC bus voltage remains at the reference value with a fast response time of approximately 0.4 s. Furthermore, DG-1 increases its current output, ensuring balanced load sharing when DG-2 is disconnected. These findings underscore the robustness of the secondary control in enhancing voltage stability and adaptive load distribution in a plug-and-play scenario.

Comparison between simulation and experimental results

To validate the proposed control strategy, this subsection presents a comparison of key performance metrics obtained from simulation and experimental results, as shown in Table 4. This table includes overshoot, efficiency, and time response, providing insights into the practical applicability of the control approach under real-time conditions. The comparison shows strong agreement between simulation and experimental results, with minor discrepancies attributed to hardware limitations and unmodeled parasitic effects. These findings confirm the robustness and practical feasibility of the proposed method.

Table 4 Comparison of simulation and experimental results for key performance metrics.

Conclusion

In this paper, a hybrid sliding mode and H-infinity control strategy is proposed for enhanced primary and secondary regulation in a DC microgrid feeding a tightly voltage-regulated boost converter that acts as a constant power load (CPL). CPLs are characterized as loads that behave like negative impedances, which introduce stability challenges to the microgrid. To adapt this nonlinear control technique to this specific case, the circulating current problem, a key limitation of the primary control, is first addressed by suggesting a sliding mode controller (SMC). This approach effectively achieves voltage regulation and ensures balanced power distribution.

The system model for each DC–DC converter in the microgrid, including the CPL, was transformed to adapt to the sliding mode controller design. This method successfully eliminates the need for passive loads with CPLs, which are commonly used in previous works. In the second step, voltage deviation, a primary control issue, is addressed through a secondary control strategy using H-infinity control. This approach combines inner SMC loops, droop control, and the CPL of each DC–DC buck converter, with model linearization achieved through the Jacobian technique.

The effectiveness of the proposed controller has been validated through simulations and experiments, involving five case studies. These tests included secondary control activation, responses to CPL fluctuations, input voltage variations, reference value changes, and sudden plug-and-play scenarios—typical situations in DC or AC microgrids. As a result, the system demonstrated effective performance in tracking, power sharing, voltage restoration, and disturbance rejection. The experimental results also validated these capabilities of the proposed controller. As a future perspective, the authors plan to extend the proposed method to handle diverse load types including motor drives. Furthermore, integrating hybrid AC–DC MGs represents a promising avenue for further investigation. These efforts aim to enhance the method’s robustness and scalability in complex and diverse MG configurations.