Introduction

Power electronic converters, such as DC-DC converters, are integral components in a wide array of electrical equipment, ranging from consumer electronics to industrial machinery1,2. Buck converters are utilized in renewable energy systems (RES) and DC microgrids3,4, electrical vehicles (EVs)5,6, electrical motors7,8, fast and wireless charging equipment’s5,9,10,11, electronics and internet of things (IoTs) applications12,13,14. These converters play a critical role in regulating voltage levels, ensuring efficient power transfer, and maintaining the stability of electrical systems. However, the fast dynamics and non-linear nature of DC-DC converters pose significant challenges for control design15,16. To achieve optimal performance, it is essential to develop controllers that not only respond swiftly to dynamic changes but also maintain robust performance across various operating conditions17.

The design and performance of controllers in DC-DC buck converters have been extensively studied, with various controllers proposed to enhance performance18. Traditional PID controllers are commonly used due to their simplicity and effectiveness19,20. However, more advanced controllers like the FOPID and tilt integral derivative (TID) controllers have been introduced to improve performance further21,22. In recent studies, PID, FOPID, TID and self-adaptive Fuzzy-PID controllers have been utilized to control buck converters and power quality enhancement23,24,25,26, demonstrating different advantages. The FOPID controller, for instance, has shown superior performance in handling the non-linear behavior of converters and electrical machines27,28, while the TID controller offers robust stability and improved dynamic response29. This sets the stage for the exploration of optimization algorithms to further enhance these controllers’ effectiveness.

To optimize the parameters of these controllers, various metaheuristic optimization algorithms have been employed. Algorithms such as the aquila optimizer (AO)30,31, African vultures optimization algorithm (AVOA)32,33, hunger games search (HGS)34, and fitness-distance balance based Runge-Kutta (FDBRUN)35 have been used to fine-tune controller coefficients, resulting in enhanced performance metrics like integral absolute error (IAE), integral square error (ISE), integral time absolute error (ITAE), and integral time squared error (ITSE)36,37,38. The integration of metaheuristic algorithms like grey wolf optimization (GWO) has shown promising results in improving the stability and disturbance rejection behavior of controllers for power converters23,39,40. Additionally, hybrid approaches41,42,43, such as the artificial ecosystem-based optimization integrated with the Nelder-Mead method (AEONM), have been proposed to combine global search capabilities with local optimization for more precise tuning42. These optimization techniques have been critical in improving the steady-state and dynamic responses of buck converters, making them more robust and efficient44. However, despite these advancements, there remains a need for controllers that can provide even faster tracking and better performance across various modes of operation.

Hekimoğlu and Ekinci21 employs a novel approach for tuning PID controller parameters in a DC-DC buck converter. The study introduces the WOASAT algorithm, a hybrid of the whale optimization algorithm and simulated annealing, enhanced with a tournament selection mechanism. Sangeetha, et al.45 proposes an improved golden jackal optimization (IGJO) algorithm to optimally tune a FOPID controller for a DC-DC buck converter. Based on this, the IGJO algorithm combines the golden jackal optimization algorithm with the capuchin search algorithm to enhance its ability to explore and exploit for finding the best FOPID parameters. In another study, Shayeghi et al.46 proposed a multi-stage PD(1 + PI) controller for a DC-DC buck converter. This controller cascades a proportional-derivative (PD) stage with a one-plus-proportional-integral (1 + PI) stage. The parameters of the PD(1 + PI) controller are optimized using the mayfly optimization algorithm (MOA) to minimize the ITAE. Similarly, Isen35, utilizes a novel approach for optimizing the parameters of PID, FOPID, and TID controllers for DC-DC buck converters using a hybrid metaheuristic algorithm called FDBRUN. The proposed FDBRUN algorithm effectively optimizes the parameters of FOPID controllers, leading to improved transient response, robustness, and overall performance enhancement for DC-DC buck converter systems compared to traditional tuning methods.

Izci et al.42 introduced a new hybrid optimization algorithm called AEONM, which combines the artificial ecosystem optimization (AEO) algorithm with the Nelder-Mead (NM) method. This AEONM algorithm showed improved optimization capabilities and effectiveness in designing PID controllers for buck converter systems. Fong et al.47 explores the application of the Archimedes optimization algorithm (AOA) for tuning PID controllers in DC-DC buck converters. The AOA is a metaheuristic method inspired by Archimedes’ principle, which has shown superior performance in various benchmark tests compared to other optimization algorithms like particle swarm optimizer (PSO), genetic algorithm (GA), sine cosine algorithm (SCA), and equilibrium optimizer (EO). Ersali and Hekimoğlu48 introduced a new hybrid metaheuristic algorithm called opposition-based cooperation search algorithm with Nelder-Mead (OCSANM) to tune the parameters of a FOPID controller for a DC-DC buck converter system. This controller provides a fast, high-performance solution by combining proportional, derivative, and integral actions in a multi-stage architecture optimized by the MOA. Nanyan et al.49 introduced the improved sine cosine algorithm (ISCA), an upgraded version of the SCA, to optimize PID controller parameters for a DC-DC buck converter. The ISCA-PID controller demonstrated superior performance in terms of transient response, frequency response, integral error metrics, disturbance rejection, and robustness to parameter variations. Table 1 summarizes the key features and optimization methods used in these studies for tuning DC-DC buck converter controllers.

Table 1 Overview of utilizing controller and optimization method for DC-DC Buck converter in the recent paper.
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In the field of power electronics, DC-DC buck converters are crucial for regulating voltage in various applications. Despite progress in controller design, achieving fast and accurate voltage tracking remains a challenge, especially during changing conditions. This study aims to tackle this issue by proposing a new controller, PIDn(1+PD), optimized with the GEO algorithm. Existing research highlights the need for better converter performance across different modes, requiring new control methods. By combining advanced control techniques with optimization algorithms, this research aims to improve transient response and frequency characteristics. Through experiments, we aim to show how the PIDn(1+PD) controller surpasses traditional ones like PID and FOPID. Ultimately, this work seeks to advance power electronics by introducing a new control approach that enhances converter performance and paves the way for future developments.

The primary contributions of this paper are as follows:

  1. (a)

    Innovative controller design: This paper introduces a novel multi-stage controller. The advanced design enables fast tracking of reference voltages, delivering robust performance across different operational modes. By integrating the N-filter and the (1+PD) component, the proposed controller minimizes overshoot and enhances stability, setting a new benchmark in control design.

  2. (b)

    Optimization method: The proposed controller employs the GEO algorithm for precise tuning of its parameters. The GEO algorithm’s ability to explore a broad solution space and converge on optimal settings enhances the controller’s performance significantly. This optimization ensures that the controller maintains high efficiency and reliability, even in complex and dynamic environments.

  3. (c)

    Comprehensive comparison: This paper conducts extensive comparative analyses between the proposed PIDn(1+PD) controller and conventional PID and FOPID controllers. By evaluating a range of performance metrics, such as rise time, settling time, overshoot, and steady-state error, under different operating conditions, the paper demonstrates the superior performance and versatility of the proposed controller.

  4. (d)

    Performance evaluation: A detailed evaluation of the closed-loop system’s behavior is conducted in both time and frequency domains. The results showcase the proposed controller’s ability to achieve minimal steady-state error, rapid dynamic response, and robust performance. This comprehensive analysis confirms the controller’s effectiveness in maintaining high performance under a wide range of operations.

  5. (e)

    Robustness and stability: The robustness and stability of the proposed controller are rigorously tested against various disturbances and parameter variations. The results highlight the controller’s capacity to maintain performance integrity, proving it to be a reliable choice for practical applications in power electronics. The design’s ability to adapt to changing conditions without compromising stability underscores its potential for widespread industrial adoption.

The paper is organized as follows: section “Mathematical model of DC-DC buck converter” covers the mathematical model of the DC-DC buck converter. Section “Motivation to use the proposed controller and optimization method” discusses the motivation to use the proposed controller and optimization method and describe the multi-stage PIDn(1+PD) controller. Section “Buck converter with proposed controller” details the placement and operation of the controller in the DC-DC buck converter, along with the optimization method. Section “Simulation and discussion” includes the simulation and analysis. Lastly, section “Conclusions and future research directions” concludes the paper.

Mathematical model of DC-DC buck converter

Buck converters, commonly employed across various electrical sectors such as computing power supplies, mobile devices, electric vehicles, and televisions, perform the task of reducing higher magnitudes of direct current (DC) voltage to lower levels. This conversion is achieved through pulse-width modulation (PWM) control, regulating the output voltage. A typical buck converter, shown in Fig. 1, consists of at least one FET power switch (MOSFET, S), a diode (D), an inductor (L), a capacitor (C), and a resistor (R) as a load. In this configuration, the inductor serves the purpose of energy storage, while the capacitor is integrated into the output to reduce voltage ripple.

In a complete switching cycle with a period \({T_{s~}}\), where \({T_{on~}}\)represents the time the switch S is on/closed and \({T_{off}}\) represents the time it is off/open, the duty cycle (D) is set by the control loop. Equations (1) and (2) shows relation between \({T_{s~}}\), \({T_{on~}}\), \({T_{off~}}\)and duty cycle respectively.

Fig. 1
figure 1

Buck converter topology.

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$${T_{on}}=D{T_s}$$
(1)
$${T_{off}}=\left( {1 - D} \right){T_s}$$
(2)

The state equations of the buck converter are determined based on Kirchhoff’s circuit laws, which are expressed through the following relations depending on the open or closed state of the S switch:

  • Close mode switch.

$$\left( {\begin{array}{*{20}{c}} {{{\hat {i}}_L}} \\ {{{\hat {v}}_o}} \end{array}} \right)=\left( {\begin{array}{*{20}{c}} 0&{ - {L^{ - 1}}} \\ {{C^{ - 1}}}&{ - {{\left( {RC} \right)}^{ - 1}}} \end{array}} \right)\left( {\begin{array}{*{20}{c}} {{i_L}} \\ {{v_o}} \end{array}} \right)+\left( {\begin{array}{*{20}{c}} {{L^{ - 1}}} \\ 0 \end{array}} \right){v_g}$$
(3)

  • Open mode switch.

$$\left( {\begin{array}{*{20}{c}} {{{\hat {i}}_L}} \\ {{{\hat {v}}_o}} \end{array}} \right)=\left( {\begin{array}{*{20}{c}} 0&{ - {L^{ - 1}}} \\ {{C^{ - 1}}}&{ - {{\left( {RC} \right)}^{ - 1}}} \end{array}} \right)\left( {\begin{array}{*{20}{c}} {{i_L}} \\ {{v_o}} \end{array}} \right)+\left( {\begin{array}{*{20}{c}} 0 \\ 0 \end{array}} \right){v_g}$$
(4)

In most power supply applications, the output voltage is controlled by adjusting the duty cycle. Therefore, in converter control studies, understanding the transfer function from diode (the Laplace transform of the duty cycle) to output voltage \(({V_o})\) is crucial. Small-signal alternating Current (AC) transfer functions can be derived using either the switching flow-graph (SFG) method or the classical method of determining the averaged state-space model. It’s important to note that both methods yield the same results. Buck converter waveforms are shown in Fig. 2. By applying Laplace transform to the averaged equations of (3) and (4), the average state-space equation of the buck converter can be expressed as follows:

$$s\left( {\begin{array}{*{20}{c}} {{I_L}\left( s \right)} \\ {{V_o}\left( s \right)} \end{array}} \right) - \left( {\begin{array}{*{20}{c}} {{i_L}\left( 0 \right)} \\ {{v_o}\left( 0 \right)} \end{array}} \right)=\left( {\begin{array}{*{20}{c}} 0&{ - {L^{ - 1}}} \\ {{C^{ - 1}}}&{ - {{\left( {RC} \right)}^{ - 1}}} \end{array}} \right)\left( {\begin{array}{*{20}{c}} {{I_L}\left( s \right)} \\ {{V_o}\left( s \right)} \end{array}} \right)+\left( {\begin{array}{*{20}{c}} {{L^{ - 1}}} \\ 0 \end{array}} \right){v_d}D\left( s \right)$$
(5)

Given the initial conditions are assumed to be zero, the transfer function of the buck converter from diode to \({V_o}\) can be calculated as follows:

$$\frac{{{V_o}\left( s \right)}}{{D\left( s \right)}}=\frac{{R{v_g}}}{{RLC{s^2}+Ls+R}}$$
(6)
Fig. 2
figure 2

Buck converter waveforms: (a) LC filter voltage, (b) Inductor current changes, (c) Capacitor voltage changes.

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Fig. 3
figure 3

Buck converter small-signal (dynamic) model.

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$${G_{vd}}\left( s \right)=\frac{{{{\hat {v}}_o}}}{{\hat {d}}}=\frac{{\frac{{{v_g}}}{{LC}}}}{{{s^2}+\frac{s}{{RC}}+\frac{1}{{LC}}}}$$
(7)
$${G_{vg}}\left( s \right)=\frac{{{{\hat {v}}_o}}}{{{{\hat {v}}_g}}}=\frac{{\frac{D}{{LC}}}}{{{s^2}+\frac{s}{{RC}}+\frac{1}{{LC}}}}$$
(8)
$${G_{id}}\left( s \right)=\frac{{{{\hat {i}}_L}}}{{\hat {d}}}=\frac{{\frac{{{v_g}}}{L} \times \left( {s+\frac{1}{{RC}}} \right)}}{{{s^2}+\frac{s}{{RC}}+\frac{1}{{LC}}}}$$
(9)
$${G_{ig}}\left( s \right)=\frac{{{{\hat {i}}_L}}}{{\widehat {{{v_g}}}}}=\frac{{\frac{D}{L} \times \left( {s+\frac{1}{{RC}}} \right)}}{{{s^2}+\frac{s}{{RC}}+\frac{1}{{LC}}}}$$
(10)

Buck converter small-signal (dynamic) model is depicted in Fig. 3. The parameters for the buck converter under study, utilized for simulation purposes, are detailed in Table 2.

Table 2 Parameters of the analyzed buck converter21,42,48,50,51,52,53.
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By using the values from the provided Table 2, we can generate an open-loop step response for the buck converter shown in Fig. 4. This response reflects a change in the duty cycle ratio, resulting in a 12 V shift in the output voltage. As shown in Fig. 4, the open-loop response of the buck converter displays a high overshoot and a lengthy settling time. To improve these aspects, we can employ a proposed controller, which is a straightforward and efficient solution. Details about this controller are discussed in the following subsection.

Fig. 4
figure 4

Open-loop step response of the DC–DC buck converter.

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Motivation to use the proposed controller and optimization method

Proposed multi-stage controller PIDn(1+PD)

This controller amalgamates a PID controller with an N-filter for enhanced performance, effectively curbing oscillations and overshoot while swiftly adapting to dynamic process changes. Additionally, integrating the PD controller ensures rapid stabilization and robust control, empowering the system to achieve optimal setpoint tracking and disturbance rejection, even in intricate, nonlinear systems.

Compared to traditional PID controllers, the PIDn(1+PD) configuration boasts several key advantages. Firstly, the inclusion of the N-filter results in smoother response characteristics, minimizing oscillations and overshoot that commonly plague conventional PID control. This translates to enhanced system stability and better transient response, ultimately leading to tighter regulation of process variables. Furthermore, the PD component augments the PIDn module by providing anticipatory control action, enabling preemptive correction of deviations from setpoints. This feature proves invaluable in scenarios requiring swift responses to disturbances or changing operating conditions. Moreover, when compared to FOPID controllers, the PIDn(1+PD) design demonstrates superior robustness and simplicity in tuning, thanks to its intuitive structure and clearly defined parameters. Leveraging the strengths of both PIDn and PD control elements, this innovative controller emerges as a versatile solution capable of tackling the intricate control challenges encountered in various sectors.

Finally, the multi-stage PIDn(1+PD) control method is used in the DC-DC buck converter because it effectively addresses the dynamic challenges found in power electronics systems. While traditional PID controllers work efficiently in many applications, they often have difficulty handling the disturbances and fast changes required by modern power converters. The innovative multi-stage PIDn(1+PD) controller combines the advantages of a high-order PIDn with a proportional-derivative (PD) component, creating a more robust control strategy that enhances performance in several important methods.

The PIDn element offers improved tuning capabilities to manage the system’s complex dynamics and increase precision in voltage regulation. This higher-order approach allows for finer adjustments, leading to reduced steady-state errors and improved system stability. Moreover, the PD component provides predictive control, which enhances the converter’s transient response by quickly reacting to rapid changes in load conditions. By integrating these components, the multi-stage PIDn(1+PD) controller effectively reduces overshoot and settling time, which are crucial for maintaining output quality and efficiency in various operating modes. Block diagram of proposed controller is demonstrated Fig. 5.

Fig. 5
figure 5

Proposed PIDn(1+PD) controller structure.

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The choice of the (1+PD) structure over the conventional PD controller is driven by several factors that enhance both performance and robustness, particularly in the context of DC-DC Buck Converters. The inclusion of the unity term (1) serves to improve the low-frequency behavior of the controller. In systems such as DC-DC converters, maintaining accurate control at lower frequencies or in steady-state conditions is essential. A pure PD controller may not sufficiently address steady-state error, which can persist under low-frequency conditions or disturbances. By incorporating the unity term, the controller ensures a continuous correction even at low frequencies, effectively reducing the steady-state error. Furthermore, the unity term contributes to enhancing the stability and robustness of the control system, providing an additional degree of control in both transient and steady-state phases. It helps mitigate the sensitivity to parameter variations and external disturbances, common in real-world power electronics applications. The inclusion of this term also complements the optimization capabilities of the GEO algorithm, allowing for more flexible tuning and better optimization results. This combination enables the (1+PD) controller to provide smoother multi-stage control, better transient response, and enhanced accuracy, making it a superior choice for the application at hand.

The open-loop transfer function of the first stage controller is shown as Eq. (11):

$${G_{PIDn}}\left( s \right)=\frac{{{d_1}\left( s \right)}}{{{\text{\varvec{\Delta}}}V\left( s \right)}}={K_P}+\frac{{{K_I}}}{s}+\frac{{{K_D}Ns}}{{s+N}}$$
(11)

The second stage provide stability and fine-tuned control for DC-DC buck converter. The open-loop transfer function of the second stage controller is shown as Eq. (12):

$${G_{\left( {1+PD} \right)}}\left( s \right)=\frac{{d\left( s \right)}}{{{d_1}\left( s \right)}}=1+{K_{PP}}+{K_{DD}} \cdot s$$
(12)

The open-loop representation of the proposed controller can be depicted by Eq. (13).

$${G_{PIDn\left( {1+PD} \right)}}\left( s \right)=\frac{{d\left( s \right)}}{{\Delta V\left( s \right)}}=\left( {{K_P}+\frac{{{K_I}}}{s}+\frac{{{K_D}Ns}}{{s+N}}} \right)\left( {1+{K_{PP}}+{K_{DD}} \cdot s} \right)$$
(13)

While the additional zero in the proposed controller results in a + 20 dB/dec slope in the Bode plot, which could amplify high-frequency noise, practical measures are implemented to mitigate this. Specifically, a low-pass filter is applied at the output of the controller to prevent the amplification of high-frequency switching noise, commonly found in power electronics circuits. This filter is tuned to have a cutoff frequency just above the system’s desired bandwidth, ensuring that the controller’s performance within the operating frequency range remains intact while high-frequency noise is effectively attenuated. Additionally, the term (\({K_D}Ns/s+N\)) in the transfer function introduces a pole that limits the high-frequency gain, functioning as a derivative filter. By carefully tuning the parameter ‘N,’ the controller further minimizes the impact of high-frequency noise. These combined strategies—low-pass filtering and derivative filtering—ensure that the benefits of the additional zero are retained without sacrificing the controller’s practical applicability in power electronics systems. In real-world applications, additional signal conditioning techniques such as proper grounding, shielding, and input signal filtering can be employed to further minimize high-frequency interference. Finally, Eq. (14) illustrates the closed-loop system.

$${G_{closedloop}}\left( s \right)=\frac{{{G_{openloop}}{G_{PIDn\left( {1+PD} \right)}}}}{{1+{G_{openloop}}{G_{PIDn\left( {1+PD} \right)}}}}$$
(14)

Selection of optimization method

The selection of the GEO algorithm for estimating the parameters of the PIDn(1+PD) controller in the DC-DC buck converter is motivated by GEO’s exceptional capability to navigate complex optimization landscapes with high precision and efficiency. GEO is a new and efficient optimization algorithm, and its efficiency has comparatively been shown through benchmark functions and engineering optimization problems. The GEO algorithm is inspired by the intelligent hunting and migration strategies of golden eagles, which allows it to balance exploration and exploitation effectively. This balance is crucial for optimizing the control parameters in proposed model, where the system’s performance can be sensitive to parameter variations and require a finely tuned solution to achieve optimal results. The GEO algorithm’s adaptive search mechanism enables it to efficiently explore the search space for the best parameter set, minimizing the risk of getting trapped in local optima, a common challenge in optimization problems. By employing the GEO algorithm, the PIDn(1+PD) controller can achieve superior performance metrics, such as reduced steady-state error, faster transient response, and improved robustness against disturbances. Additionally, GEO’s relatively simple implementation and fast convergence make it an attractive choice for DC-DC buck converter.

Buck converter with proposed controller

Figure 6 depicts the block diagram of the buck converter system incorporating a PIDn(1+PD) controller. In this diagram, \({V_{ref}}\left( s \right)\), \(E\left( s \right)\), and \({V_o}\left( s \right)\), represent the reference voltage, error voltage, and output voltage, respectively. Utilizing the parameters listed in Tables 2 and 3, we derive the unity feedback closed-loop transfer function of the buck converter as Eq. (15).

$${G_{closedloop}}\left( s \right)=\frac{{\left( {2.0462E+07} \right){s^3}+\left( {1.6232E+06} \right){s^2}+\left( {1.7292E+07} \right)s+\left( {1.3081E+06} \right)}}{{\left( {6E - 07} \right){s^4}+\left( {2.0462E+07} \right){s^3}+\left( {1.6232E+06} \right){s^2}+\left( {1.7293E+07} \right)s+\left( {1.3081E+06} \right)}}$$
(15)
Table 3 Optimum gains of proposed and other controllers.
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Fig. 6
figure 6

Block diagram of close-loop DC-DC Buck converter with proposed controller and GEO algorithm.

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The purpose of the controller design is to enhance the dynamic characteristics of the system while eliminating the steady-state error in the converter response. This involves minimizing the integral of the system response deviation from the desired value, denoted as \(\:e\left(t\right)\). With semiconductor technologies driving high-speed dynamics in converter switches, it’s crucial to maintain or even improve the response speed of the closed-loop system. Therefore, alongside minimizing the integral of the system response deviation, we must also consider the speed or time taken to clear the error. To address these requirements effectively, the ITAE is selected as the optimization cost function (CF), defined as Eq. (16):

$$C{F_{min}}=\mathop \int \limits_{0}^{{{t_{sim}}}} t \cdot {\left| {\Delta v} \right|^2}dt$$
(16)

The CF is restricted by the range of controller coefficients, defining the search space for the optimization problem as presented in Table 4. Also, Table 3 demonstrates the optimal gain obtaiend with proposed controller and GEO algorithm. The GEO optimization algorithm was iteratively executed in five distinct rounds. Using 50 iterations and participation of 10 particles, the GEO algorithm effectively identifies the optimal controller coefficient values. The duration of the simulation is \(t=6 \times {10^{ - 6}}~s\). Similar to the other metaheuristic approaches, there are parameters that affect the efficiency of the GEO algorithm apart from population size and maximum number of iterations. The studies in the literature employ the two parameters of the GEO by setting them as follows: Propensity to attack (\({P_a}=\left[ {0.5,~2} \right]\)) and propensity to cruise (\({P_c}=\left[ {1,~0.5} \right]\)). In this regard, we have adopted similar parameters for the optimization of DC-DC Buck converter system.

Table 4 Range of gains in proposed and other controllers.
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Table 5 illustrates the highest, lowest, and mean CF values attained across various controllers. Figure 7 depicts the detailed flowchart showcasing the proposed controller and the GEO algorithm, utilized to improve the performance of the DC-DC buck converter’s voltage control system. Figure 8 offers a comparative examination through boxplots of five distinct algorithms: GEO, hippopotamus optimization algorithm (HO), pelican optimization algorithm (POA), PSO and GA. evaluating their effectiveness in minimizing the objective function. Notably, the boxplot in Fig. 8 demonstrates that the poorest result achieved by the GEO algorithm significantly outperforms the best results obtained by fourth the HO, POA, PSO and GA algorithms. This underscores the pronounced superiority of the proposed GEO algorithm in terms of performance. Also Fig. 9 shows CF values of different algorithms with proposed controller. Figure 7 includes the Golden Eagle image, which is sourced from Vitalentum.net.

Table 5 Values of the CF following five rounds of optimization algorithms using PIDn(1+PD) controller.
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Fig. 7
figure 7

The schematic of the suggested controller that uses the GEO optimization method to regulate the voltage of a DC-DC buck converter.

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Fig. 8
figure 8

Boxplot of various algorithms.

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Fig. 9
figure 9

CF values of different algorithms with proposed controller.

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Transient response analysis

In the evaluation of controllers within the time domain, certain fundamental measurements such as rise time (\({T_r}\)), settling time (\({T_s}\)), percent overshoot (\(OS\)), and peak time (\({T_p}\)) hold considerable importance. In Fig. 10, we can observe the step response of the buck converter system using the proposed controller, which has been fine-tuned through the GEO algorithm. Table 6 provides a comprehensive breakdown of performance metrics across different controller strategies in the time domain, encompassing parameters such as \({T_r}\), \({T_s}\), \(OS\), and \({T_p}\). By analyzing the numerical data in the table alongside the step response visuals in the figure, it’s clear that the GEO/PIDn(1+PD) controller showcases the most desirable transient response characteristics, including no overshoot, fast settling time, and swift rise time.

Table 6 Transient response of proposed and different controllers.
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Fig. 10
figure 10

Step response of proposed controller.

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To enable a comprehensive numerical comparison, calculations and reporting on time domain evaluation metrics have been conducted across various scenarios. These metrics include the ISE, ITSE, IAE, and ITAE. The corresponding equations for these metrics are outlined in equations (17) through (20).

$$ISE=\mathop \smallint \limits_{0}^{K} {e^2}\left( t \right)dt$$
(17)
$$ITSE=\mathop \smallint \limits_{0}^{K} t.{e^2}\left( t \right)dt$$
(18)
$$IAE=\mathop \smallint \limits_{0}^{K} \left| {e\left( t \right)} \right|dt$$
(19)
$$ITAE=\mathop \smallint \limits_{0}^{K} t.\left| {e\left( t \right)} \right|dt$$
(20)

Where, K is simulation time in s, and \(e\left( t \right)\) is an error signal between reference voltage and output voltage in DC-DC buck converter. Table 7 represents value of different cost function.

Table 7 Time-based indicators demonstrating the dynamic response of DC-DC buck converter.
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Frequency response

When assessing controllers in the frequency domain, key factors like gain margin, phase margin, and bandwidth play a pivotal role. In Fig. 11, we observe the Bode plot of the buck converter system employing proposed controller, designed through GEO algorithm. Table 8 provides performance metrics for all approaches in the frequency domain, covering parameters such as gain margin, phase margin, and bandwidth. Comparing the numerical results in the table with the Bode plots in the figure, it becomes evident that the GEO/PIDn(1+PD) controller exhibits the most stable frequency response.

Table 8 Frequency response metrics of proposed and different controllers.
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Fig. 11
figure 11

The Bode diagram of the closed-loop buck converter using proposed controller.

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Simulation and discussion

In this section, the proposed PIDn(1+PD) controller is operationalized and integrated into the DC-DC buck converter control mechanism as discussed earlier in section “Motivation to use the proposed controller and optimization method”. Moreover, these findings show a strong correlation between the results obtained from classical controllers54,55. Subsequently, the closed-loop system is implemented using MATLAB 2023a with Simulink.

Analyzing a DC-DC buck converter in different operating contexts provides valuable insights into its versatility and performance. Through careful examination, it is possible to understand how the converter can have a suitable output with different input voltages, load conditions, and element values. Such an analysis helps to understand the behavior and performance characteristics of the converter. By studying its response to different operating parameters, we can achieve a deeper understanding of the capabilities and limitations of the converter and design a controller that has minimum loss of efficiency and maximum efficiency against these fluctuations. Basically, a comprehensive analysis of the buck DC-DC converter in different operating scenarios allows us to evaluate the appropriate performance of the designed controller.

Scenario I: analyzed system in different 3 steps

Step 1::

Setting the initial reference voltage.

Step 2::

Shifting to another output voltage level.

Step 3::

Applying the disturbance in the output voltage.

At first, the output voltage level is set at 12 V (Vref = 12 V). After establishing this initial voltage, the reference voltage is decreased from 12 to 6 V at \(t=2 \times {10^{ - 6}}~s\). Subsequently, at \(t=4 \times {10^{ - 6}}~s\), a sudden positive disturbance of 1 V change emerges in the converter output voltage, necessitating swift resolution. This error in the output represents a significant disturbance, with the reference voltage at 6 V, constituting more than 16% of the disturbance visible at the output. This disturbance is assumed to manifest as a step increase of + 1 V at the output of the converter as shown in Fig. 12. Figure 12 shows the output voltage of the closed-loop buck converter during reference voltage changes and disturbances by employing proposed and different PID controllers. Figure 13 shows the output voltage of the closed-loop buck converter during reference voltage changes and disturbances by employing proposed and different FOPID controllers.

Fig. 12
figure 12

Output voltage of the closed-loop buck converter during reference voltage changes and disturbances by employing proposed and different PID controllers.

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Fig. 13
figure 13

Output voltage of the closed-loop buck converter during reference voltage changes and disturbances by employing proposed and different FOPID controllers.

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Scenario II: performance of DC-DC Buck converter in uncertainty inductance

The performance of DC-DC buck converters is critical in various electronic applications, particularly in efficiently regulating voltage. One significant factor influencing their performance is the inductance within the circuit. In this section, we investigate the impact of inductance uncertainty on the performance of a DC-DC buck converter. Specifically, we examine two scenarios. Through the analysis of these scenarios, our objective is to demonstrate the exceptional performance of the proposed controller and highlight its significant difference compared to other controllers under identical conditions.

Increase inductance + 10% to 1.1 (mH)

A 10% increase in inductance to 1.1 (mH) can induce substantial alterations in converter behavior. This rise might compromise the converter’s capacity to regulate voltage effectively, potentially resulting in fluctuations in output voltage and ripple. However, these effects can be mitigated through the design of a robust controller, ensuring a reliable output. The proposed controller offers this assurance compared to alternative controllers.

Decrease inductance − 10% to 0.9 (mH)

On the other hand, a decrease in inductance by ten% to 0.9 (mH) also presents challenges for the DC-DC buck converter’s performance. A reduction in inductance can alter the converter’s dynamics, affecting its transient response and overall stability. The decreased inductance may lead to higher ripple currents and voltage spikes, posing potential risks to the converter and other components in the circuit. As depicted in Table 9, the values demonstrate the remarkable performance of the proposed controller in comparison to others.

Table 9 Performance comparisons for Inductance uncertainty.
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Scenario III: performance of DC-DC Buck converter in uncertainty capacitor

Another element that affects the efficiency and reliability of DC-DC buck converters is the capacitors used in their circuits. In this section, we examine how uncertainty in capacitor values affects the performance of such converters. In particular, we investigate two scenarios. By analyzing these scenarios, we aim to demonstrate the performance of the proposed controller in the condition that the circuit capacitors are defective.

Increase capacitor + 10% to 110 \(\mu F\)

A slight boost of 10% in capacitance to 110 (\(\mu F\)) can greatly impact the performance of the DC-DC buck converter. This adjustment might disrupt the converter’s capability to uphold a steady voltage output, leading to fluctuations in voltage regulation and ripple suppression.

Decrease capacitor − 10% to 90 \(\mu F\)

On the other hand, a 10% decrease in capacitance to 90 (\(\mu F\)) creates obstacles for the buck DC-DC converter performance. Decreasing capacitance may impair the converter’s ability to filter noise and react to sudden changes, possibly compromising its stability. With less capacity, there is a risk of increased voltage waves and reduced energy storage capacity, which can threaten the converter and other circuit components. As depicted in Table 10, the values demonstrate the remarkable performance of the proposed controller in comparison to others.

Table 10 Performance comparisons for capacitor uncertainty.
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Scenario IV: performance of DC-DC Buck converter in uncertainty resistance

Another element that the performance of DC-DC buck converters is strongly dependent on is resistance. This resistance usually adjusts the voltage and current in the buck converter. In this part, we will examine the effect of uncertainty in the resistance values on the performance of the DC-DC buck converter. In particular, we examine two scenarios. By examining these scenarios, our goal is to reveal the effect of the strong controller in compensating the sudden increase or decrease in resistance in the buck converter circuit.

Increase resistance + 20% to 7.2 \(\:\varOmega\:\)

A 20% increase in resistance to 7.2 (\(\:\varOmega\:\)) can significantly change the behavior of the buck DC-DC converter. This change may impair the converter’s ability to regulate voltage effectively, potentially leading to output voltage fluctuations and increased power losses.

Decrease resistance − 20% to 4.8 \(\:\varOmega\:\)

On the other side, a 20% reduction in resistance to 4.8 (\(\:\varOmega\:\)) poses challenges for DC-DC buck converter performance. Reduced resistance may affect the converter’s current control capabilities and efficiency, potentially affecting its overall stability. Lower resistance levels can lead to increased current flow and increased power dissipation, creating hazards for the converter and other components in the circuit. As depicted in Table 11, the values demonstrate the remarkable performance of the proposed controller in comparison to others.

Table 11 Performance comparisons for resistance uncertainty.
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Conclusions and future research directions

This study introduced and analyzed the performance of a new multi-stage PIDn(1+PD) controller for DC-DC buck converters, with parameters optimized using the GEO algorithm. Our research shows the controller’s exceptional ability to achieve fast-tracking voltages and maintain robust performance across different operating modes. A thorough comparison with traditional PID and advanced FOPID controllers, along with various metaheuristic optimization techniques, confirms the superiority of the proposed controller. The PIDn(1+PD) controller demonstrates improved time and frequency domain characteristics, proving its effectiveness in handling the non-linear and fast dynamic nature of DC-DC converters. Using the GEO algorithm for parameter optimization has been successful in enhancing the controller’s performance, ensuring minimal steady-state error and a quick dynamic response. This innovative approach addresses the complexities inherent in power electronic converters, offering a high-speed, robust solution that outperforms existing controllers. Overall, the findings of this research provide valuable insights into the design and optimization of controllers for DC-DC buck converters, advancing the field of power electronics.

The PIDn(1+PD) controller, with its optimized parameters, stands out as a reliable and efficient solution, paving the way for future developments in this area. The practical applicability of the proposed PIDn(1+PD) controller in power electronics systems is reinforced by the mitigation strategies employed to handle high-frequency noise. By integrating a low-pass filter and derivative filtering, the controller is capable of attenuating high-frequency noise while maintaining the advantages provided by the additional zero in the transfer function. This ensures that the proposed controller can operate effectively in real-world power electronics environments, where high frequency switching signals are prevalent. Additionally, the robust design, coupled with practical considerations such as signal conditioning, makes this controller suitable for industrial applications requiring high stability, precision, and dynamic performance.

Future research endeavors could explore several avenues aimed at extending and refining the findings of this study. Firstly, there is a pressing need for hardware implementation to validate the proposed control strategy’s efficacy in real-world applications, thereby bridging the divide between theoretical analysis and practical deployment. Robustness analysis emerges as a critical domain, necessitating investigation into the controller’s resilience against diverse operating conditions, including load variations, input voltage perturbations, and voltage fluctuations, thereby ensuring stability and reliability across a spectrum of scenarios. Furthermore, the exploration of multi-objective optimization techniques presents a promising trajectory, enabling the simultaneous optimization of efficiency, transient response, and cost-effectiveness to meet the multifaceted demands of contemporary power electronics applications. Adaptive control strategies represent a compelling avenue for research, wherein dynamic parameter adjustment in response to evolving operating conditions could enhance adaptability and performance robustness in dynamic environments. Moreover, the integration of the proposed control strategy with renewable energy systems warrants scrutiny, with a focus on augmenting overall system efficiency and stability in distributed power generation contexts, thereby advancing the paradigm of sustainable energy conversion. By embarking on these research trajectories, the field stands poised to realize substantial advancements in the domain of power electronics, fostering innovation and addressing emerging challenges in energy conversion and management.