Resistive random-access-memory (RRAM)-based computing-in-memory (CIM) chips could overcome the von Neumann bottleneck and drastically improve energy efficiency for artificial intelligence (AI) applications. However, realizing their scalability necessitates the realization of higher-density integration, calling for cross-layer innovations from RRAM device optimization and unit cell design to integration strategies.
- Yuan He
- Chengxiang Ma
- Jianshi Tang